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what is the overall power efficiency?


  • On the TX side of the signal chain design, the last amplifier before the antenna element is the HMC498LC4 with an OP1dB of 24.5dBm. The HMC498LC4 also has PAE of 23% at a saturated output power of 26dBm.  Currently, we have preliminary power trees built out for our 16 element Tx/Rx Ka-band (27-31GHz) subarray. These can be found on our wiki page here and should give you a sense of power efficiency. We are also working on optimizing performance of our system, along with generating the 512-element array power tree. We will publish the updated power trees to our wiki page in the coming weeks.

    Depending on the use case, there are ways to reduce the overall power consumption as well. The current system showcases 32 subarrays with 16 transmit and 16 receive elements. These elements are combined to form 4 individual analog beams. Each of the 4 analog beam instances from the sub arrays are combined digitally 32:1 in a dedicated FPGA or digital ASIC. If we reduced the number of beams combined in the FPGA or ASIC, we would reduce the overall processing power or digital power consumption. We could also reduce the number of elements as well to reduce the RF chain power consumption.