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96kHz audio: is it supported?

It wasn't clear to me if 96kHz audio could also be supported end to end. Please explain?

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  • The technology supports programmable sampling rates at each node in the system, from 1.5 - 192kHz. You can have any combination of sampling rates in a single system, but the superframe rate is 48kHz. This means that you need to properly care for slot assignments when programming the A2B transceivers. For example, if you are sampling at 96kHz on one node, you'll need to have two slots assigned on the bus for that node such that each superframe transports two samples at the 48kHz bus rate.

  • Hi,
        We understand that slave could be configured for 96kHz /192kHz. Master could be configured for 48kHz only .Based on the master configuration, slot assignments need to be handled Please confirm the understanding. We have below queries in A2B register configuration for this handling.  Please share your feedback in this.   
       
    1) Is enabling 'A2B_I2SRATE.REDUCE' bit is necessary for 96kHz/192kHz support. For input 96kHz -> Output  96kHz is expected with reduce bit as '0'. Please confirm.
    2) 'We understand 'A2B_I2SRATE.I2SRATE' bit configuration handling supports for 96/192kHz configuration of slave.Is any other handling in A2B register setting is required.Please confirm.
    3) For 2ch -96kHz Upstream handling, slave is configured for TDM2- 96kHz & Master is configured for 48kHz and TDM4. Please confirm is this slave & master configuration is okay for 96kHzinput & 96kHz output support.
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  • Hi,
        We understand that slave could be configured for 96kHz /192kHz. Master could be configured for 48kHz only .Based on the master configuration, slot assignments need to be handled Please confirm the understanding. We have below queries in A2B register configuration for this handling.  Please share your feedback in this.   
       
    1) Is enabling 'A2B_I2SRATE.REDUCE' bit is necessary for 96kHz/192kHz support. For input 96kHz -> Output  96kHz is expected with reduce bit as '0'. Please confirm.
    2) 'We understand 'A2B_I2SRATE.I2SRATE' bit configuration handling supports for 96/192kHz configuration of slave.Is any other handling in A2B register setting is required.Please confirm.
    3) For 2ch -96kHz Upstream handling, slave is configured for TDM2- 96kHz & Master is configured for 48kHz and TDM4. Please confirm is this slave & master configuration is okay for 96kHzinput & 96kHz output support.
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