Fundamentals of Clocks

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Products Mentioned

ADF4360-2 Production
The ADF4360-2 is a fully integrated integer-N synthesizer and voltage-controlled oscillator (VCO). The ADF4360-2 is designed for a center frequency of...
Datasheet
ADF4360-2 on Analog.com

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ADF4360-1 Production
The ADF4360-1 is a fully integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-1 is designed for a center frequency of...
Datasheet
ADF4360-1 on Analog.com

Associated Drivers

AD9516-2 Recommended for New Designs
The AD9516-2 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip...
Datasheet
AD9516-2 on Analog.com

Associated Drivers

AD9516-0 Recommended for New Designs
The AD9516-0 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip...
Datasheet
AD9516-0 on Analog.com

Associated Drivers

ADF4360-5 Production
The ADF4360-5 is a fully integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-5 is designed for a center frequency of...
Datasheet
ADF4360-5 on Analog.com

Associated Drivers

ADF4360-0 Production
The ADF4360-0 is a fully integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-0 is designed for a center frequency of...
Datasheet
ADF4360-0 on Analog.com

Associated Drivers

AD9516-3 Recommended for New Designs
The AD9516-3 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip...
Datasheet
AD9516-3 on Analog.com

Associated Drivers

ADF4360-4 Production
The ADF4360-4 is a fully integrated integer-N synthesizer and voltage-controlled oscillator (VCO). The ADF4360-4 is designed for a center frequency of...
Datasheet
ADF4360-4 on Analog.com

Associated Drivers

ADF4360-9 Production
The ADF4360-9 is an integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-9 center frequency is set by external inductors...
Datasheet
ADF4360-9 on Analog.com

Associated Drivers

AD9557 Recommended for New Designs
The AD9557 is a low loop bandwidth clock multiplier that provides jitter cleanup and synchronization for many systems, including synchronous optical networks...
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ADF4106 Production
The ADF4106 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and...
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ADF4106 on Analog.com

Associated Drivers

AD9516-1 Recommended for New Designs
The AD9516-1 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL and VCO. The on-chip...
Datasheet
AD9516-1 on Analog.com

Associated Drivers

ADF4360-8 Production
The ADF4360-8 is an integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-8 center frequency is set by external inductors...
Datasheet
ADF4360-8 on Analog.com

Associated Drivers

AD9858 Production
The AD9858 is a direct digital synthesizer (DDS) featuring a 10-bit digital-to-analog converter (DAC) operating up to 1 GSPS. The AD9858 uses advanced...
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ADF4351 Recommended for New Designs
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Datasheet
ADF4351 on Analog.com

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AD5933 Production
The AD5933 is a high precision impedance converter system solution that combines an on-board frequency generator with a 12-bit, 1 MSPS, analog-to-digital...
Datasheet
AD5933 on Analog.com

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AD9512 Recommended for New Designs
The AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in...
Datasheet
AD9512 on Analog.com

AD9516-5 Recommended for New Designs
The AD9516-5 provides a multi-output clock distribution function with subpicosecond jitter performance, along with an on-chip PLL that can be used with...
Datasheet
AD9516-5 on Analog.com

Associated Drivers

ADF4360-6 Production
The ADF4360-6 is a fully integrated integer-N synthesizer and voltage-controlled oscillator (VCO). The ADF4360-6 is designed for a center frequency of...
Datasheet
ADF4360-6 on Analog.com

Associated Drivers

ADF4002 Recommended for New Designs
The ADF4002 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters...
Datasheet
ADF4002 on Analog.com

Associated Drivers

ADF4360-7 Production
The ADF4360-7 is an integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-7 center frequency is set by external inductors...
Datasheet
ADF4360-7 on Analog.com

Associated Drivers

ADF4360-3 Production
The ADF4360-3 is a fully integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-3 is designed for a center frequency of...
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ADF4360-3 on Analog.com

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AD9516-4 Recommended for New Designs
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AD9516-4 on Analog.com

Associated Drivers

About the Webinar

This webcast will provide an introduction to clocks and frequency synthesis, clock terminology, timing and common applications. We will discuss Phase-locked loops (PLL), Analog PLLs, Digital PLLs and Direct Digital Synthesis.

Presenters

Dave Kress Director of Technical Marketing

Webinar Questions

by drewphysics Webinar

Latest over 8 years ago by UmeshJ

818 1 0

Not Answered
ADS7-V2 and VisualAnalog software and AD9680 ADC board 0
Not Answered

We have the V2 of the ADS7, and an AD9680 ADC board. My first question: 1. the AD9680 requires an input clock of at least 300MHz, correct? We don't have such a clock, but we are pretty sure that the ADS7-V2 could generate it and send it out of the...

ad9680 Fundamentals of Clocks High Speed A/D Converters >10 MSPS Standard High Speed A/D Converters Webinar Forum Show More

818 1 0
by muku_kr Webinar

Latest over 8 years ago by muku_kr

1947 7 0

Answered
IN AD9833 HOW TO GENERATE 1 KHZ FREQUENCY 0
Answered

HOW TO GENERATE 1 KHZ FREQUENCY INAD9833

Fundamentals of Clocks Webinar Forum

1947 7 0
by BerlinAnalog Webinar

Started over 9 years ago

501 0 0

Not Answered
AD5933 external clock signal 0
Not Answered

Dear Community, could you help me with my problem, please? https://ez.analog.com/thread/94779 Thank you!

ad5933 calibration clock and timing Fundamentals of Clocks Clocks & Timers source clock Direct Digital Synthesis (DDS) ad5933 i2c ad5933 Webinar Forum Show More

501 0 0
by ADIApproved

Webinar

Latest over 9 years ago by ADIApproved
954 1 0
Answered
Could you please talk about the relationship between the phase noise of the reference and that of the in-band, close-loop PLL output? 0
Answered

Could you please talk about the relationship between the phase noise of the reference and that of the in-band, close-loop PLL output?

clocks Fundamentals of Clocks Webinar Forum

954 1 0
by ADIApproved

Webinar

Latest over 9 years ago by ADIApproved
858 1 0
Answered
Why do some systems use a frequency doubler instead of a PLL? Do DDS spurs change with phase shift of, for example, 90 degrees versus 0? 0
Answered

Why do some systems use a frequency doubler instead of a PLL? Do DDS spurs change with phase shift of, for example, 90 degrees versus 0?

clocks Fundamentals of Clocks Webinar Forum

858 1 0
by ADIApproved

Webinar

Latest over 9 years ago by ADIApproved
769 1 0
Answered
Do you recommend any particular way of filtering DDS DAC output (digital controlled filters?) 0
Answered

Do you recommend any particular way of filtering DDS DAC output (digital controlled filters?)

clocks Fundamentals of Clocks Webinar Forum

769 1 0
by ADIApproved

Webinar

Latest over 9 years ago by ADIApproved
645 1 0
Answered
Most of my work is below 1GHz, yet the ADI portfolio seems to almost completely ignore this range. 0
Answered

Most of my work is below 1GHz, yet the ADI portfolio seems to almost completely ignore this range.

clocks Fundamentals of Clocks Webinar Forum

645 1 0
by ADIApproved

Webinar

Latest over 9 years ago by ADIApproved
825 1 0
Answered
What device/families are best to produce sine/cosine without conversion to square? 0
Answered

What device/families are best to produce sine/cosine without conversion to square?

Fundamentals of Clocks Webinar Forum

825 1 0
by ADIApproved

Webinar

Latest over 9 years ago by ADIApproved
800 1 0
Answered
Is the All-Digital PLL's jitter-cleaning driven by giving a constant time reference (the clock's timing) and therefore detecting where the signal has departed from correct timing? 0
Answered

Is the All-Digital PLL's jitter-cleaning driven by giving a constant time reference (the clock's timing) and therefore detecting where the signal has departed from correct timing?

clocks Fundamentals of Clocks Webinar Forum

800 1 0

Fundamentals of Clocks

Products Mentioned

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Associated Drivers

About the Webinar

Presenters

Not Answered ADS7-V2 and VisualAnalog software and AD9680 ADC board 0 Not Answered

Answered IN AD9833 HOW TO GENERATE 1 KHZ FREQUENCY 0 Answered

Not Answered AD5933 external clock signal 0 Not Answered

Answered Could you please talk about the relationship between the phase noise of the reference and that of the in-band, close-loop PLL output? 0 Answered

Answered Why do some systems use a frequency doubler instead of a PLL? Do DDS spurs change with phase shift of, for example, 90 degrees versus 0? 0 Answered

Answered Do you recommend any particular way of filtering DDS DAC output (digital controlled filters?) 0 Answered

Answered Most of my work is below 1GHz, yet the ADI portfolio seems to almost completely ignore this range. 0 Answered

Answered What device/families are best to produce sine/cosine without conversion to square? 0 Answered

Answered Is the All-Digital PLL's jitter-cleaning driven by giving a constant time reference (the clock's timing) and therefore detecting where the signal has departed from correct timing? 0 Answered

Not Answered
ADS7-V2 and VisualAnalog software and AD9680 ADC board 0
Not Answered

Answered
IN AD9833 HOW TO GENERATE 1 KHZ FREQUENCY 0
Answered

Not Answered
AD5933 external clock signal 0
Not Answered

Answered
Could you please talk about the relationship between the phase noise of the reference and that of the in-band, close-loop PLL output? 0
Answered

Answered
Why do some systems use a frequency doubler instead of a PLL? Do DDS spurs change with phase shift of, for example, 90 degrees versus 0? 0
Answered

Answered
Do you recommend any particular way of filtering DDS DAC output (digital controlled filters?) 0
Answered

Answered
Most of my work is below 1GHz, yet the ADI portfolio seems to almost completely ignore this range. 0
Answered

Answered
What device/families are best to produce sine/cosine without conversion to square? 0
Answered

Answered
Is the All-Digital PLL's jitter-cleaning driven by giving a constant time reference (the clock's timing) and therefore detecting where the signal has departed from correct timing? 0
Answered