What limits the maximum input voltage and what is the expected development schedule for increasing it?

What limits the maximum input voltage and what is the expected development schedule for increasing it?

  • On behalf of Anthony Armstrong: 
    The maximum input voltage is limited by the wafer fabrication process node upon which we design the IC. Currently, for our silent switchers, the process nodes are; ~5V, ~20V, 4~2V and ~65V. However, we are looking into much high input voltages such as 80V and 100V, and even greater. However, you should contact your local ADI representative for background and details on our future developments.