Is the All-Digital PLL's jitter-cleaning driven by giving a constant time reference (the clock's timing) and therefore detecting where the signal has departed from correct timing?

Is the All-Digital PLL's jitter-cleaning driven by giving a constant time reference (the clock's timing) and therefore detecting where the signal has departed from correct timing?

  • On behalf of Jeff Keip.

    The All Digital PLL enables us to design a digital loop filter which can be designed much narrower without the uncertainty (aging, temp drift, absolute accuracy e.g.) associated with passive and analog elements of an analog loop filter.  We have digital loop filters that are capable of bandwidths below 1 mhZ.