Analog.com Analog Dialogue Wiki English 简体中文 日本語
$EngineerZone
EngineerZone
  • Log In
  • Site
  • Search
  • User
  • Forums

    Popular Forums

    • RF and Microwave
    • Power Management
    • Video
    • FPGA Reference Designs
    • Precision ADCs
    • Linux Software Drivers
    • SigmaDSP Processors & SigmaStudio Dev. Tool

    Product Forums

    • A2B
    • Amplifiers
    • Analog Microcontrollers
    • Clock and Timing
    • Data Converters
    • Direct Digital Synthesis (DDS)
    • Energy Monitoring and Metering
    • Interface and Isolation
    • MEMS Inertial Sensors
    • Processors and DSP
    • Switches/Multiplexers
    • Temperature Sensors
    • Voltage References
    View All

    Application Forums

    • Audio
    • Automated Test Equipment (ATE)
    • Condition-Based Monitoring
    • Depth, Perception & Ranging Technologies
    • Embedded Vision Sensing Library
    • Motor Control Hardware Platforms
    • Optical Sensing
    • Precision Technology Signal Chains Library
    • Video
    • Wireless Sensor Networks Reference Library

    Design Center Forums

    • ACE Evaluation Software
    • ADEF System Platforms
    • Design Tools and Calculators
    • FPGA Reference Designs
    • Linux Software Drivers
    • Microcontroller no-OS Drivers
    • Reference Designs
    • Signal Chain Power (SCP)
    • Software Interface Tools
    • System Demonstration Platform (SDP) Support
  • Learn

    Highlighted Webinar

    Digital Isolator Working Voltage Considerations for End Application Optimization

    Recent Discussions

    • Inconsistent receiver power between 2 transmissions of the same signal
    • DMA (from PS to PL) unexpected behavior
    • ADALM-PLUTO firmware upgrade crash
    • Change Size of QSPI Partition / Bad FIT Image Format
    • iiostream-common.h location

    Places

    • ADI Education Home
    • ADI Webinars
    • StudentZone (Analog Dialogue)
    • Video Annex
    • Virtual Classroom

    Latest Webinars

    • Digital Isolator Working Voltage Considerations for End Application Optimization
    • In-vehicle Networking Simplified with 10BASE-T1S
    • Design of Multi-Band Phased Array Systems for Space Applications
    • Designing Optimized Power Solutions for Precision Signal Chains (2023)
    • One Size Fits All - Power Your Applications with an Integrated Power IC
    View All Webinars
  • Community Hub

    Challenge Yourself!

      KCC's Quizzes AQQ248 about a funny function
    View All

    Places

    • Community Help
    • Logic Lounge
    • The Weekly Brew

    Resources

    • EZ Code of Conduct
    • EZ How To Help Articles
    • Getting Started Guide
    • ADI: Words Matter
    • Community Help Videos
    View All
  • Blogs

    Highlighted Blogs

    Why AI Assisted/Enabled Buildings Need Intelligent Edge Devices

     

    Mastering Precision: A Guide to Setup Your Laboratory for IPn Measurement

    Latest Blogs

    • A Visit to the EMC Lab: Radiated Vs. Conducted Emissions and Immunity
    • Finally, Batteries You Can Believe
    • Powering Your Drive - It's More Than Just Plugging It In
    • How Old Wires Are Bringing New Efficiencies to Building Retrofits
    • Can AI Do Safety?
    Read All Blogs

    ADI Blogs

    • EZ Spotlight
    • The Engineering Mind
  • Partners

    Electronic Design Services - PartnerZone

    • Boston Engineering
    • Calian, Advanced Technologies
    • Colorado Engineering Inc. (DBA CAES AT&E)
    • Clockworks Signal Processing
    • Epiq Solutions
    • Fidus
    • PalmSens
    • Richardson RFPD
    • Tri-Star Design, Inc.
    • VadaTech
    • Vanteon
    • X-Microwave
    View All
Video
Video
Documents ADV7181C CP_AGC_GAIN
  • Q&A
  • File Uploads
  • Docs/ FAQs
  • Members
  • Tags
  • More
  • Cancel
  • FREE RUN
  • +AD724: FAQ
  • +AD725: FAQ
  • +AD7441A: FAQ
  • +AD8122: FAQ
  • +AD8380: FAQ
  • +AD8381: FAQ
  • +AD9388A: FAQ
  • +AD9389: FAQ
  • +AD9880: FAQ
  • +AD9882: FAQ
  • +AD9884A: FAQ
  • +AD9888: FAQ
  • +AD9889B: FAQ
  • +AD9978: FAQ
  • +AD9981: FAQ
  • +AD9984A: FAQ
  • +AD9985A: FAQ
  • +AD9994: FAQ
  • +ADA4891: FAQ
  • +ADDI7004: FAQ
  • +ADI Video Parts: FAQ
  • +ADV202: FAQ
  • +ADV212: FAQ
  • +ADV3002: FAQ
  • +ADV3224/25/28/29: FAQ
  • +ADV7123: FAQ
  • +ADV7125: FAQ
  • +ADV7128: FAQ
  • +ADV7171: FAQ
  • +ADV7174: FAQ
  • +ADV7179: FAQ
  • +ADV7180: FAQ
  • +ADV7180W: FAQ
  • -ADV7181C: FAQ
    • ADV7181C CP_AGC_GAIN
    • ADV7181C Design Support Files
    • Configuring the ADV7181C for RGB with external CSync from a camera
    • How to configure the ADV7181C to generate interrupts?
    • What is the status of pixel output pins when /RESET is held low on the ADV7181C?
    • What resistor value should we use as a pull-up for the reset pin?
  • +ADV7181D: FAQ
  • +ADV7182: FAQ
  • +ADV7183B: FAQ
  • +ADV7184: FAQ
  • +ADV7185: FAQ
  • +ADV7188: FAQ
  • +ADV7202: FAQ
  • +ADV7280: FAQ
  • +ADV7281: FAQ
  • +ADV7282: FAQ
  • +ADV7283: FAQ
  • +ADV728x: FAQ
  • +ADV7341: FAQ
  • +ADV7343: FAQ
  • +ADV734X: FAQ
  • +ADV7390: FAQ
  • +ADV7393: FAQ
  • +ADV739x: FAQ
  • +ADV7401: FAQ
  • +ADV7403: FAQ
  • +ADV7441A: FAQ
  • +ADV7480: FAQ
  • +ADV7481: FAQ
  • +ADV7482: FAQ
  • +ADV749x: FAQ
  • +ADV7510: FAQ
  • +ADV7511: FAQ
  • +ADV7513: FAQ
  • +ADV7520: FAQ
  • +ADV7604: FAQ
  • +ADV7610: FAQ
  • +ADV7611: FAQ
  • +ADV7612: FAQ
  • +ADV7613: FAQ
  • +ADV7614: FAQ
  • +ADV7619: FAQ
  • +ADV7622: FAQ
  • +ADV7623: FAQ
  • +ADV7625: FAQ
  • +ADV7626: FAQ
  • +ADV7627: FAQ
  • +ADV7630: FAQ
  • +ADV7800: FAQ
  • +ADV7802: FAQ
  • +ADV7842: FAQ
  • +ADV7844: FAQ
  • +ADV7850: FAQ
  • +ADV78xx: FAQ
  • +adv8003: FAQ
  • +ADV8005: FAQ
  • +Advantiv: FAQ
  • +AN-1191: FAQ
  • +analog input muxing: FAQ
  • +Apple TV: FAQ
  • +Customer hardware validation scripts: FAQ
  • +CVBS: FAQ
  • +Decoder Product: FAQ
  • +DVP Evaluation Software: FAQ
  • +EVAL-MELODY: FAQ
  • +HDCP-Enabled Parts: FAQ
  • +HDMI: FAQ
  • +I2C: FAQ
  • +PCB Trace Impedance Calculator: FAQ
  • +VESA Standards: FAQ
  • +xtal Load Caps: FAQ

ADV7181C CP_AGC_GAIN

Question: We took some readings from the AGC gain registers at addresses  0xA0 and 0xA1 in the ADV7181C. However,  these surprisingly always seem to return a value of 0x3FF; which indicates the gain is saturated at maximum even though the video itself looks good. Do you have any idea why we are getting these values?

 

We also read the values of the Horizontal sync depth on channel A (Green) via registers 0xA7 ad 0xA8. These gave more believable results, ranging from 0x1D9 (473) to 0x1EA(490) dependent on the video channel measured.

Answer: A HSD_CHA value of 0x1D9 (473) corresponds to about 185mV, and a value of 0x1EA (490) corresponds to about 191mV. This sounds reasonable, but it of course depends on the source.

Your script on the other hand sets manual gain. So the AGC is not used. The gain value for A_GAIN, B_GAIN and C_GAIN is set to 0x100, which corresponds to a gain of 0.5.

What is read back in CP_AGC_GAIN is the gain that would be applied to reach the target gain if AGC was used. This gain is auto calculated after the manual gain.

So a 185mV with a 0.5 manual gain will give you 92.5mV.

In your script AGC_TAR_MAN is set to 0 (AGC operates based on HS_NORM) and HS_NORM is set to 0 (AGC target is 300mV). So the gain required would be 300 / 92.5 = ~3.24, which is why the value read back shows the gain would be saturated.

  • adv7181c
  • Share
  • History
  • More
  • Cancel
Related
Recommended
Social
Quick Links
  • About ADI
  • ADI Signals+
  • Analog Dialogue
  • Careers
  • Contact us
  • Investor Relations
  • News Room
  • Quality & Reliability
  • Sales & Distribution
  • Incubators
Languages
  • English
  • 简体中文
  • 日本語
myAnalog

Interested in the latest news and articles about ADI products, design tools, training and events?

Go to myAnalog
Analog Logo
©1995 - 2023 Analog Devices, Inc. All Rights Reserved
沪ICP备09046653号-1
  • Sitemap
  • Legal
  • Privacy & Security
  • Privacy Settings
  • Cookie Settings