The user can reposition the synchronization signal output from the regenerated input synchronization signal within the CP block with the control bits as below:
• start_hs[9:0]
• end_hs[9:0]
• start_vs[3:0]
• end_vs[3:0]
• start_fe[3:0]
• start_fo[3:0]
Before adjusting the parameters please make sure the following control bits are set correctly:
Steven