cycle and negative cycle are not symmetric to VMID when the input code is
lower but for large input code seems better. My conditions are
In this conditions I suppose the output is
VMID+2(VREFHI-VREFHO)=6+5=11V ...... for VOUTN
VMID-2(VREFHI-VREFLO)=6+5=1V ...... for VOUTP
but the result is 12.7V and 0.68V.
Can I directly connect the VREFLO to GND and VREFHI=2.5V?
How about AD8380 output resister? The data sheet recommend VID output connect a
25ohm resister, if I can use 75ohm or large?
Everything seems not bad but I just one problem in my image which has smear
phenomenon. I am not sure if this smear is due to above problem or the speed is
not fast or other reason? The smear always happen on black to white image (or
black pixel to white pixel on the row) and better for white to black. Do you
have any ideal for this smear problem.
Question 1. You have two problems:
1. You can't have VREFHI and VREFLO below VMID ( see page 2, of the datasheet,
section 2 titled "REFERENCE INPUTS", lines 4 and 5). To fix your problem,
connect VREFLO to VMID and make VREFHI=(VMID+2.5V).
2. For best results, you should not allow the outputs to go below 1.3V (see
page 2 of the datasheet, section 5 titled "VIDEO OUTPUT CHARACTERISTICS"). To
fix these two problems, raise VMID to say 6.5V, connect VREFLO to VMID and set
VREFHI to 9V. With these two fixes the output should be symmetrical to VMID.
The VCME specification (page 2, line 3 in the datasheet) tells you that you can
expect VOUTN and VOUTP to be symmetrical to within 2mV when all voltages are
set within the correct ranges. (Error in symmetry ~ 2xVCME).
Question 2. Cannot connect VREFLO (and VREFHI) to a voltage that is less than
VMID.So, cannot connect VREFLO to GND and VREFHI to 2.5V. You need to connect
VREFLO to VMID and VREFHI to (VMID+2.5) for a 5V full scale voltage.
Question 3. 25 ohm series resistors give you the least overshoot at the
outputs. You can use 75 ohm resistors but depending on the capacitance of your
panel and the CLK speed at the AD8380, you may slow down the outputs with these
resistors enough to create a "smearing".
Question 4. The smear could be caused by too large of a series output resistor
(>25 Ohms), CLK speed at the AD8380 or your horizontal clock to the panel
getting to the panel too early compared to the video from the AD8380. Try
reducing the series resistors in the AD8380 to 25 Ohms and delay the H. clock
to the panel by 15 ns or a little more.