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AD8380: General conditions for various PINS
Video requires membership for participation - click to join
8-bit 656 script for ADV7611EB1Z, ADV7611EB2Z, ADV7612EB1Z, ADV7612EB2Z, ADV7619
A multi register control does not appear to have any effect?
AD724: Crystal advice
AD725: Loss of voltage level
AD725: NTSC min/max bandwidth
AD8380: General conditions for various PINS
AD8381: Temperature range
AD9388A - power supply sequence
AD9388A Design Support Files
AD9389 what jitter tolerance the AD9389 on the input Clock might be tolerant
AD9389: Dual Link DVI Mode?
AD9880/AD9380/AD9381/AD9398/AD9393 Design Support Files
AD9880: Can the I2C address by changed by SA0 pin?
AD9884A: Crosstalk from HSYNC and VSYNC to the HSOUT line
ad9884a: Usage of the serial interface in high-speed mode (400kb/Sec)
AD9888: What time is required to achieve a stable video output once the power down bit is de-asserted?
AD9889B/AD9389B Design Support Files
AD9889B: does the AD9889B support the format 1080i50
AD9978: could i control the output current of the AAD9978?
AD9984A / AD9983A Design Support Files
AD9984A eval board schematics+layout
AD9985A Design Support Files
AD9985A: Disable Three-state data outputs
AD9994: Exposed paddle, VSG masking and running the part at 40MHz
ADDI7004 - not being able to move the video stream to the dark
ADI Recommended Setting
Adjusting Hue in Video decoders and HDMI receivers
adv202: Buffer data from two cameras
ADV212 Design Support Files
ADV212: Encoding and decoding of HD video
ADV3002 Design Support Files
ADV3224/25/28/29 Design Support Files
ADV7123 - Vref minimum and maximum specification is missing in the datasheet
ADV7123 and ADV7125 sync levels
ADV7123 and ADV7125 Thermal Characteristics
ADV7123: Analog O/P values
ADV7123: Driving terminated video lines
ADV7123: Output with no power applied
ADV7125: Run off 3.3V supply
ADV7128: Used for Audio application
ADV7171 evaluation board
ADV7174 / ADV7179 Design Support Files
ADV7180 Design Support Files
ADV7180 Fast Switch Script
ADV7180 in 8-bit video mode
ADV7180 Video Decoder - Crystal Specification
ADV7180: Clock frequency and XTAL pin
ADV7180W - VBI Data: VDP content-Based Data Update; for certain standards such as WSS, CGMS, PDC etc....... the available bit shows the availability of that standard only when its content has changed. Is this as well possible for closed captioning?
ADV7180W - VBI Data: What happens with the register and the AVL bit if the source suddenly stops sending closed captioning? (a) is the old information still valid? (b) will the old information become invalid?
ADV7180W VBI DATA: (1) What happens if the CCAP register is not read?
ADV7181C Design Support Files
ADV7181D Design Support Files
ADV7182 Datasheet Default Values
ADV7182 Design Support Files
ADV7183B: Differences between ADV7183A and ADV7183B
ADV7183B: Video noise on the output
ADV7184 - Brightness control clips the maximum digitized pixel value (contrast has no effect)
ADV7184 Design Support Files
ADV7184/8: What is the maximum video input to output delay
ADV7185: CAPI interface cases field bit
ADV7185: Thermal considerations
ADV7188 - How Do I Program the ADV7188 correctly?
ADV7188 Design Support Files
ADV7202: Operation of clamping function
ADV7280 / ADV7280-M Design Support Files
ADV7281/ADV7281-M / ADV7281-MA Design Support Files
ADV7282 and ADV7282-M Design Support Files
ADV7283 Design Support Files
ADV728x Design Support files
ADV7341: SPI Interface for the ADV7341
ADV7341: Which Standards does the ADV7341 Support
ADV7343BSTZ versus ADV7343BSTZ-3
ADV734x - Documentation needed
ADV734x Design Support Files
ADV7390, ADV7391: unused SFL pin
ADV7393 Can ADV7393 drive VGA signals?
ADV7393 Strange Behaviour - customer question
ADV7393: dissappearing SPI Interface - Missing SPI Interface between datasheet Rev A and Datasheet Rev C
ADV7393: Output tri-synce at 3G data rates?
ADV739x Design Support Files
ADV739x Hardware Reset
ADV739X Internal Color Bars Output Levels
ADV7401 Design Support Files
ADV7403 Design Support Files
ADV7441A Design Support Files
ADV7441A: flexibility of the part to change the output picture rate at a fix input rate?
ADV7480 Design Support Files
ADV7481 Design Support Files
ADV7482 Design Support Files
ADV7510 Design Support Files
ADV7511 - difference between KSTZ and KSTZ-P
ADV7511 - hdmi clock range / input video clock range
ADV7511 Design Support Files
ADV7511KSTV and ADV7511KSTV-P: Are these parts interchangeable if you are not using HDCP?
ADV7511W Design Support Files
ADV7513 Design Support Files
ADV7520 & AD9387NK I2C addresses different to that of Programming Guide?
ADV7604 Design Support Files
ADV7604: How to use in non supported video formats?
ADV7610 Design Support Files
ADV7610 EVAL schematics pin definition issue with datasheet
ADV7611 Design Support Files
ADV7612 4 x 192kHz audio
ADV7612 Design Support Files
ADV7612 with internal HDCP key
ADV7613 Design Support Files
ADV7614 Design Support Files
ADV7619 Design Support files
ADV7619: difference between the ADV7619KSVZ and ADV7619KSVZ-P?
ADV7619: Support for Advanced Cipher mode and Enhanced Link Verification?
ADV7622 Design Support Files
ADV7623 Design Support Files
ADV7625 ADV7626 ADV7627 evaluation board software package documents
ADV7625 Design Support Files
ADV7625 HDCP Authentication without a 5V signal
ADV7626 Design Support Files
ADV7627 Design Support Files
ADV7630 Design Support files
ADV7630 issues at frequencies greater than 150MHz?
ADV7800 Design Support Files
ADV7802 Design Support Files
ADV7842 3D Capabilities
ADV7842 5V tolerant pins - Hot Swap and CEC
ADV7842 Design Support Files
ADV7842 evaluation board schematic download
ADV7844 Design Support Files
ADV7850 Design Support Files
ADV7850 OUTPUT SYNCHRONIZATION SIGNAL POSITIONING
ADV8003 Design Support Files
ADV8005 evaluation board software package documents
Advantiv EDID Editor
Advantiv Video Evaluation Software (AvesGold)
Advantiv® Software Documents for Video Interface Products
Advantiv™ EVAL-ADV7612-7511 Video Evaluation Board
Advantiv™ EVAL-ADV7619-7511 Video Evaluation Board
Advantiv™ EVAL-ADV7625-SMZ Video Evaluation Board
Advantiv™ EVAL-ADV7842-7511 Video Evaluation Board
Advantiv™ EVAL-ADV7850EBZ Video Evaluation Board
Advantiv™ EVAL-ADV8003-SMZ Video Evaluation Board
Advantiv™ EVAL-ADV8003-SMZ-P Video Evaluation Board
Advantiv™ EVAL-ADV8005-SMZ Video Evaluation Board
Advantiv™ EVAL-ADV8005-SMZ-P Video Evaluation Board
Advantiv™ Video Evaluation Boards
Advantiv™ Video Evaluation Software
Advantiv™ Video Evaluation Software (AVESBlue)
Advantiv™ Video Evaluation Software 3 (AVES3)
AN-1191 Application Note source code
Apple TV Issue
Are Multiple Video Streams over Single MIPI CSI-2 Link Possible on the ADV728x ?
Black line on the Output from the ADV7282-M
Blimp OSD Designer tool for NatureVue™ ADV800x and Advantiv® ADV7625
Blimp OSD Designer tool for NatureVue™ ADV800x and Advantiv® ADV7625 release notes archive
Can I drive an SDI encoder directly from one ADV decoders ?
Can I dynamically re-map the component luma (Y Channel) input to be a composite (CVBS) input and reduce analog connectors on my system connectors?
Can I update an ADV7510 design with ADV7511?
Can the ADV7343 (or any of the encoders) scale the 640 pixel active line length to 700 pixels in RS170 modes?
Can the ADV734X or ADV739X support the RS170 Spec?
Common HDMI Transmitter Applications Issues
Composit video transfered to PC via USB
Connecting two ADV7184 to one PPI of the ADSP-BF533_2_1
Customer hardware validation scripts for ADI HDMI products
Customer hardware validation scripts for ADV7610
Customer hardware validation scripts for ADV7611
Customer hardware validation scripts for ADV7612
Customer hardware validation scripts for ADV7619
Customer hardware validation scripts for ADV7623
Customer hardware validation scripts for ADV7625
Customer hardware validation scripts for ADV7626
Customer hardware validation scripts for ADV7627
Customer hardware validation scripts for ADV7630
Customer hardware validation scripts for ADV7842
Customer hardware validation scripts for ADV7844
Customer hardware validation scripts for ADV8003
defferent between AD9981 and AD80105Z
Designing with ADI Video Parts
Difference Between Pseudo Differential CVBS and Fully Differential CVBS
Does the ADV7390 support the BT656 format: 640×480(VIC No1, certified EIA-CEA-861)?
Dual external OSD in PIP/POP with ADV8005 - demo binaries
DVP Evaluation Software
EVAL-MELODY-5 Evaluation Board support files (public)
EVAL-MELODY-6 Evaluation Board support files (public)
EVAL-MELODY-7 Evaluation Board support files (public)
Evaluation board EVAL-ADV7180LFEBZ
Explanation As To Why the Crystal Does Not Oscillate on ADV7182 or ADV728x Systems After Powerup
FAQ: Is there an evaluation board for the ADV7513?
Fast Switch Mode- ADV728x
Floating Inputs to ADV7125
Full scale input range and offset adjustment range
Getting connected to VESA Standards
Having issues with the ADV7623 reading an EDID or seeing HDCP Controller errors?
HDCP detection in ADV7842
HDMI Layout Guideline
HDMI schematics reviewing (ADV7611, ADV7612, and other)
How can I determine the refresh rate of input video in HDMI-GR mode of ADV7441A?
How can I get the absolute position of DE on an active line with ADV7842?
How can I restore u-boot on EVAL-ADV8003-SMZ?
How can I restore u-boot on EVAL-ADV8005-SMZ?
How can I restore u-boot on EVAL-MELODY-5?
How can I restore u-boot on EVAL-MELODY-6?
How do I calculate manual gain settings in the ADV7844 and ADV7842?
How do I qualify external SDRAM for use on ADV78xx products ?
How Do I Use an External Oscillator to Clock the ADV728x ?
How do we limit the MCLK Output frequency on the HDMI Receivers?
How does the ADV7441A determine which sample is which component in double data rate video modes?
How long does it take for the frame latency measurement readbacks to settle after the incoming video becomes stable?
How many KSV's can ADI HDMI Receivers support?
How should the SFL pin be handled if it is not going to be used in a design?
How to configure the ADV7181C to generate interrupts?
How to Detect That the Crystal is Working Correctly on the ADV7182/ADV728x
How to program an Interrupt to tell if the ADV7182/ADV728x has locked or lost locked
How to set the color depth in the ADV8003 HDMI TX to 0
How to tell if the ADV7180/ADV7182/ADV728x has locked to a video source?
How to tristate the TTL outputs of the ADV7182 and ADV728x models
I want to get more luma B/W through the SD decoder path ?
I2C readback not reading what I have written !
I2C write sequence
Importance of xtal Load Caps on decoder products
In the 64-lead LQFP version of the ADV7180, can 8 bit YCrCb data be output on the Pixel Port Pins [7:0] ?
Is it possible to invert the pixel clock (LLC) output from the ADV8003?
Is the new AD8122 pin compatible with the older AD8123 equalizer?
My I2C writes seem to work, but when I read the value back it's not what I wrote. What happened?
Narrow Hsync & Vsync Input Deglitch Filter
Notes about the crystal neeeded for the ADV7180 or ADV7182
On the ADV7393, how should unused digital inputs be handled?
Output of the ADV7182 in Reset and Powerdown mode
PackageTray and Tube size and quantities
PCB Trace Impedance Calculator
Please clarify the ADV739x Evaluation possibilities - which EVAL Boards does exist
Read First: Design Support Files Overview
Restrictions Relating to the Distribution of HDCP-Enabled Parts
Selecting the correct Xtal on decoder products.
Should I use the STDI for the ADV7441A in single shot or continuous mode?
Terminating the HDMI B-inputs to the ADV7612??
The Audio FAQ for ADV7842 and ADV7604
The unused SFL pin at ADV749x
Using the ADV8003 TX, how do I transmit extended colorimetry video such as sYCC601, xvYCC709, xvYCC601, AdobeYCC601 and AdobeRGB
Video Support Community
What are the differences between ADV7610 and ADV7611?
What are the thermal characteristics for the ADV7123 and ADV7125?
what does the "-3" on the brand of ADV7390/1/2/3 and ADV7340/1/2/3 indicate?
What encoder I2C writes are needed to support NTSC 4.43
What encoder should I use ?
What happens when I get the color space info incorrect?
What is the status of pixel output pins when /RESET is held low on the ADV7181C?
What power rating should be used for the RSET resistor used with the ADV734X and ADV739X encoders?
What power up sequence should be used with the ADV8003?
What resistor value should we use as a pull-up for the reset pin?
What software is available from ADI for Video parts?
What to do with unused analog video input pins (Ain) on video decoders ?
What Video Output Standard does the ADV7182 Output in Free-Run Mode
What Video Output Standard does the ADV728x Output in Free-Run Mode
When I try to write to I2C registers of the ADI HDMI transmitter, the register values do not change. What is going on?
Where can I find documentation for ADV8005?
Which ADV739X or ADV734X video encoder should I choose?
Which pins on the ADV7393 are used to input SD 8-bit 422?
Why does the ADV7842 HS output jitter by 1 pixel clock period when the output pixel clock is 157.5MHz?
AD8380: General conditions for various PINS
I continuous to test the AD8380 and found one problem. I found the positive
cycle and negative cycle are not symmetric to VMID when the input code is
lower but for large input code seems better. My conditions are
In this conditions I suppose the output is
VMID+2(VREFHI-VREFHO)=6+5=11V ...... for VOUTN
VMID-2(VREFHI-VREFLO)=6+5=1V ...... for VOUTP
but the result is 12.7V and 0.68V.
Can I directly connect the VREFLO to GND and VREFHI=2.5V?
How about AD8380 output resister? The data sheet recommend VID output connect a
25ohm resister, if I can use 75ohm or large?
Everything seems not bad but I just one problem in my image which has smear
phenomenon. I am not sure if this smear is due to above problem or the speed is
not fast or other reason? The smear always happen on black to white image (or
black pixel to white pixel on the row) and better for white to black. Do you
have any ideal for this smear problem.
Question 1. You have two problems:
1. You can't have VREFHI and VREFLO below VMID ( see page 2, of the datasheet,
section 2 titled "REFERENCE INPUTS", lines 4 and 5). To fix your problem,
connect VREFLO to VMID and make VREFHI=(VMID+2.5V).
2. For best results, you should not allow the outputs to go below 1.3V (see
page 2 of the datasheet, section 5 titled "VIDEO OUTPUT CHARACTERISTICS"). To
fix these two problems, raise VMID to say 6.5V, connect VREFLO to VMID and set
VREFHI to 9V. With these two fixes the output should be symmetrical to VMID.
The VCME specification (page 2, line 3 in the datasheet) tells you that you can
expect VOUTN and VOUTP to be symmetrical to within 2mV when all voltages are
set within the correct ranges. (Error in symmetry ~ 2xVCME).
Question 2. Cannot connect VREFLO (and VREFHI) to a voltage that is less than
VMID.So, cannot connect VREFLO to GND and VREFHI to 2.5V. You need to connect
VREFLO to VMID and VREFHI to (VMID+2.5) for a 5V full scale voltage.
Question 3. 25 ohm series resistors give you the least overshoot at the
outputs. You can use 75 ohm resistors but depending on the capacitance of your
panel and the CLK speed at the AD8380, you may slow down the outputs with these
resistors enough to create a "smearing".
Question 4. The smear could be caused by too large of a series output resistor
(>25 Ohms), CLK speed at the AD8380 or your horizontal clock to the panel
getting to the panel too early compared to the video from the AD8380. Try
reducing the series resistors in the AD8380 to 25 Ohms and delay the H. clock
to the panel by 15 ns or a little more.
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