AD9994: Exposed paddle, VSG masking and running the part at 40MHz

Q 

1. The AD9994 has a exposed pad centered on the package. Is it floating/NC or
must it connect to ground?
2. VSG outputs can be masked out. What level appears on the outputs then?
3. If I run it at 15..40°C Ta and 10 bit resolution, is there a risk to clock
it at 40 MHz?

 

A 

1) There is an exposed "paddle" on the under side of the package. This paddle
is actually electrically and thermally connected directly to the substrate of
the die. Generally we recommend that the exposed paddle is soldered to a ground
plane in order to provide a thermal path and reduce thermal resistance.

You can find out more about working with the LFCSP package from our packaging
vendor Amkor:
http://www.amkor.com/products/All_Products/MLF.cfm
Application note from Amkor on surface mount assembly of LFCSP packages:
http://www.amkor.com/products/notes_papers/MLFAppNote.pdf

2) When masking the VSG outputs, you ignore the toggle locations (SGTOG1,
SGTOG2) and the output level is defined by the starting polarity (SGPOL).

3) We do not guarantee any performance beyond 36MHz, but you should be ok under
the conditions you list below (15C to 40C, 40MHz, and 10bit resolution). The
product line did some bench work at 40MHz that supports this, but did not
characterize the part fully at 40MHz and do not test for it in production so we
can't make any guarantees.