Here we described about "What is EDID and Its Terminologies".
EDID -> Extended Display Identification Data
Purpose -> Enable plug and play capabilities of the sink. It describes the video formats that are supported by the display device.
EDID is stored in:
1) PROM (Programmable ROM)
2) EEPROM (Electrically Erasable PROM)
EDID is a standard published by the Video Electronics Standards Association (VESA). It is a data structure provided by displays to describe its capabilities to a video source. For EDID, the data includes:
- Manufacturer name
- Manufacturer serial numb
- Product type
- Phosphor of filter type
- Timings supported by the display
- Display size
- Luminance data
- Pixel mapping data
All sink devices complaint to the HDMI specification must implement EDID.
Source device checks the display’s DVI or HDMI port for the presence of an EDID PROM and uses the information inside to optimize the output video and/or audio format.
DDC or Display Data Channel describes the protocol and physical path used by the source and display to communicate. It is typically assigned to a pin or pins on the interface, and carries the EDID/HDCP.
Source should use the DDC to read the EDID data from Sink devices. If incase the DDC lines are not connected then source can send any specific format without knowing the Sink capability.
Please note DDC uses a standard serial signaling scheme known as the I2C bus and it consists of three wires: SDA - data, SCL - clock, and a logic "high" DC pull-up voltage. For the DDC, the logic "high" voltage is specified to be +5V.
HPD (Hot Plug Detection):
A pin on the HDMI connector that allows the source device to sense when a display device has been connected to it and its EDID is readable.
Hot Plug detection is not supported for Analog interfaces, but it is supported in Digital interfaces including DVI, HDMI and Display Port.
For these interfaces, the display device will supply a voltage on an HPD pin to signal to the video source device that it is connected So the video source device monitors the voltage on the HPD pin and then initiates EDID requests as it senses incoming voltage.
The absences of a voltage on the HPD pin indicates disconnection.
Note: Generally, the connection process begins when the source outputs a +5V signal on Pin 18 to the sink, which sends back the +5V signal to the source on pin 19 which is the hot plug detect pin.
If the hot plug is asserted, then the source will read the capabilities of the sink device.
Internal EDID Vs External EDID:
Generally, a legacy HDMI system will have only two EDID blocks(256 bytes) and will only use segment 0. The first EDID block is always a base EDID structure defined in VESA EDID specifications and the second EDID block is usually the CEA extension defined in the CEA-861D specification
Internal EDID – Volatile Memory:
Internal EDID is volatile one So we need to re-program the internal EDID RAM every time during powerup.
RAM SIZE: Internal E-EDID memory can store only upto 256 bytes.
If the internal E-EDID RAM is enabled for one specific port , an external E-EDID storage device must not be connected on the DDC bus of that port.
External EDID – Non-Volatile Memory:
External EDID EEPROM is one way of providing non volatile storage of EDID data and it would allow the DVI/HDMI source to detect the board even if the board is not powered.
If customer is trying to use the External EDID and they need to ensure the below things,
The external device should be connected to the DDC_SCL/DDC_SDA pins on the HDMI connector. If the external E-EDID is enabled for one specific port , an internal E-EDID must not be connected on the DDC bus of that port.
Please note when an external storage device is used for storing the E-EDID data of a specific HDMI port, the storage device must be connected to the DDC lines of that HDMI port and also we need to ensure that internal E-EDID should not be enabled for such specific port.
How to determine the Source would read the EDID ?
Best way is to monitor the DDC lines capture (i.e Capture the DDC lines with a I2C monitor).
Sequence needs to be followed while uploading the EDID into Source device:
1) HPA_MAN_VALUE_X =1
2) HPA_A pin active =0
3) HPA_MAN_VALUE_A =0, Set HPA low
4) Wait 100ms
4) load up the EDID
5) HPA_MAN_VALUE_A =1, Set HPA high, forces source to reload EDID
1) Set HPA_MAN_VALUE_A = 1 ; Set bit high
2) HPA_TRISTATE_A = 0 ; Make HPA pin an output
3) Set HPA_MAN_VALUE = 0 ; Pulls HPA pin low
4) Wait 100ms ;
5) Set HPA_TRISTATE = 1 ; Makes HPA pin an input / Turn the HPA pin tri-state So the pull up resistor can pull HPA high (i.e External pull up resistor will create the rising edge on the HPD causing the PC to re-read the EDID ).
Customer frequent issue when using the PC as source device:
Customer need to take care while using the PC as source.
PC and Consumer sources(Player’s) are generally do not work unless they see a valid EDID. PC will only recognize a sink when they detect an valid EDID.
Customer need to make sure with below things when bringing up the board,
1) Disconnect PC from the Part (Chipset)
2) Run script
3) Configure EDID
4) Configure SPA registers (More than one Port)
5) Plug PC into the Part. This should cause the PC to read the EDID
Below thread contains an EDID initialization script,
Advantiv EEditGold Tool:
The first 128 byte is only VESA block only. The number of extensions are specified on the 'General' tab. The extensions are CEA extensions. The EDID data can be one or two or many blocks long. Normally we see the EDID as 2 blocks totally 256 bytes.
The last byte of each 128 block is the check sum for that block so byte 128 and 256 will change as you change the respective block.
Customer can use this EEdit tool to visualize and modification of EDID data blocks.
Download our EDID Editor here: (+) Advantiv EDID Editor - Documents - Video - EngineerZone (analog.com)