ADV7180

Hi, we are using ADV7180.
It seems that ADV7180 has some gain.
Please let me know the reason why ADV7180 has any gain, if the following contents of the resisters are incorrect.
My understanding is that we usually use ADV7180 with no gain.

We are setting the resisters as follows,

0x00  0x00
0x04  0x57
0x17  0x41
0x31  0x02
0x3D  0xA2
0x3E  0x6A
0x3F  0xA0
0x55  0x81
0x0E  0x00

Then let me know any other reasons you can hit on.

We are waiting for your response.

  • 0
    •  Analog Employees 
    •  Super User 
    on Jul 22, 2014 5:29 PM

    Are you using the right resistor divider network on the analog inputs?

    Also please recheck your register sequence above,  it needs to be exactly as shown in Table 1.  I don't see you opening up the hidden space with 0x0E 0x80 write.  Table 118 is sequence dependent.

  • Hi, GuenterL . Thank you for your quick response.
    After my review of the setting of resisters, this problem heve been clear.
    Then, another questions happen.
    I have find the following Table in the datasheet of ADV7180.

    -------------------------------------------------------

    Table61. RANGE Function
    Range                Description
    0                   16≦Y≦235,16≦C/P≦240
    1(default)        1≦Y≦254,1≦C/P≦254

    -------------------------------------------------------

    My questions.
    Q1.
    Does ADV7391 also have the same functions ?

    Q2.
    In the case of using ADV 7391 and ADV7180 together,like "ADV7180BCPZ -> FPGA -> ADV7391BCPZ".
    If ADV7391 do not have these functions, should I adjust Y and C/P of ADV7180 ?

  • 0
    •  Analog Employees 
    •  Super User 
    on Jul 28, 2014 5:10 PM

    These two parts can be connected together.  You need to defined the formats you want to do and the pixel bus width.  The ADV7180 can only do SD formats.

    The ranges you see in Table 61 are related to BT.601 with separate sync inputs versus BT.656 with embedded syncs.