there' an issue reported by Huawei, said there's big jitter be found at the AD9880 output Hsync pin, I described the issue by attached doucment, thanks for your support.
AD9880
Not Recommended for New Designs
The AD9880 offers designers the flexibility of an analog interface and High-Definition Multimedia Interface (HDMI™) receiver integrated on a single chip...
Datasheet
AD9880 on Analog.com
there' an issue reported by Huawei, said there's big jitter be found at the AD9880 output Hsync pin, I described the issue by attached doucment, thanks for your support.
Hi William,
Can you ensure that the customer is using the following TMDS PLL settings:
Register | Setting | Comment |
---|---|---|
0x4D | 0x3B | ADI Recommended Write |
0x4E | 0x6D | ADI Recommended Write |
0x4F | 0x54 | ADI Recommended Write |
0x50 | 0x90 | ADI Recommended Write |
0x53 | 0x3F | ADI Recommended Write |
0x59 | 0x20 | ADI Recommended Write |
These are the latest recommended settings. These settings also apply to the AD9380, AD9381, AD9396, AD9397 and AD9398.
Thanks,
Joe
Hi William,
Can you ensure that the customer is using the following TMDS PLL settings:
Register | Setting | Comment |
---|---|---|
0x4D | 0x3B | ADI Recommended Write |
0x4E | 0x6D | ADI Recommended Write |
0x4F | 0x54 | ADI Recommended Write |
0x50 | 0x90 | ADI Recommended Write |
0x53 | 0x3F | ADI Recommended Write |
0x59 | 0x20 | ADI Recommended Write |
These are the latest recommended settings. These settings also apply to the AD9380, AD9381, AD9396, AD9397 and AD9398.
Thanks,
Joe