Minimum HSYNC frequency for AD9984A

From the AD9984A data sheet, "The 12-bit Divisor Register" --> "The input Hsync frequencies can accommodate any Hsync as long as the product of the Hsync and the PLL divisor falls within the operating range of the VCO"

The range for the PLL clock is 10 - 170 MHz which is greater the PLL range for the AD9985A.  So The AD9984A should work just fine with 15kHz Hsync.

If you are redesigning the board you might also look at the ADV7842 instead.  It's

• ADV7842 is a newer part
• We have working evaluation board with full scripts
• You don't have to use external SDRAM
• You can totally ignore the HDMI inputs
• It's smaller

Also check out

Read First: Design Support Files Overview

Thank you for your answer. I had not considered the ADV7842. However, it is larger, not smaller (17 X 17 mm vs 9 X 9 mm for the AD9984A) and costs about twice as much as the AD9984A. Since the AD9984A seems to do what I need, I think that I will stick with that.

One more question on the AD9984A regarding the GROUND connection for the 64 Lead LFCSP part. No place on the datasheet mentions where the ground connection for the part is located (unlike the 80 pin variant). I assume that it is the exposed bottom pad. If this is not correct, please let me know. I usually do not like to assume anything.

Mike

Yes, the ground for the LFCSP package appears to be missing from the data sheet.  It is the exposed center pad as you suspected.