Does ADV7630 have the "TMDS PLL Reset "register who is similar to AD7842?
Please refer to "2.2.8 TMDS PLL Lock" of "ADV7842_Recommended_Settings_Rev2.0.pdf" Page 8.
More information below.
We sell the monitor display which used ADV7630.
The issue occurred by the configuration of PC + one Video Card(4ch DVI outputs).
One ADV7630 is connected in DVI-out 1ch.
When, by the configuration, we repeat a reboot with a PC + Video Card,
At a rate of once roughly 30 times, the ADV7630 are no-correct output.
In that case it returns to the normal state by performing the following such operations.
a) change Resolution (pixel clock)
b) HPD oeration
However, these processes affect the PC and other ch7s AD7630, it will cause incorrect behavior.
Therefore, we are looking for ways to initialize only internal.
Plese refer to "2.2.8 TMDS PLL Lock" of "ADV7842_Recommended_Settings_Rev2.0.pdf" Page 8.
I am still working with the ADV7630 experts to confirm the locations of these bits. Sorry for the delay.
Chip when something goes wrong, the chip reset pin can't return to normal, i2c failure at this point, speaking, reading and writing, and grab the i2c waveform is as follows
When writing to the reset bit, the device will not acknowledge. All ADV parts will behave the same way. It resets quickly so you likely never got the ACK.
Please make sure - After a reset, it's recommended to wait 5ms before you initiate an I2C transaction.By executing a software reset takes approximately 2ms. However, it is recommended to wait 5ms before any further I2C writes are performed.
Please create new thread,unless it would be difficult for tracking.