Power-Up Sequence ADV8003

Hi,

From data sheet of ADV8003, during the power-up sequence of the ADV8003,

1. Hold the /RESET and PDN pins low.

2. Bring up the 3.3 V supplies (DVDD_IO, AVDD1, AVDD2).

3. A minimum delay of 20 ms is required from the point at which the 3.3 V reaches its minimum recommended value (that is, 3.14 V) before powering up the 1.8 V supplies.

4. Bring up the 1.8 V supplies (DVDD, PVDD1, PVDD2, PVDD3, PVDD5, PVDD6, CVDD1, AVDD3, DVDD_DDR, PVDD_DDR). These should be powered up together. That is, there should be a difference of less than 0.3 V between them.

5. /RESET can be pulled high after supplies have been powered up.

6. A complete reset is recommended after power-up. This can be performed by the system microcontroller.

At Step 5 " /RESET can be pulled high after supplies have been powered up ".

Q1) When this /RESET signal can be pulled high ?

Q2) If there is no reason to pull high, Can we ommit this step5) ?

Thanks.

  • With regards to your Q1, I'm not sure I understand your question. The RESET# pin on ADV8003 should be driven low until all of the power supplies have been powered up. Then it can be driven high. I would suggest you use a voltage monitoring IC to accomplish this.

    With regards to your Q2, I'm not sure I understand your question. Perhaps you are getting confused by our statement "RESET# can be pulled high after supplies have been powered up." In my opinion, a better description would be "RESET# can be driven high after supplies have been powered up."

    -Matt

  • Thanks for your reply.

    I confused the reset signal itself.

    Figure shows, RESET goes low then high after powered up  => this is power up reset case.

    Then RESET goes low again and goes high => Reset during normal operation.

    Figure describes two cases.

    Thanks.