I have two questions about ADV7125.
1. The VAA pin is described "Analog Power Supply(5V +/-5%)." in table-6 ,datasheet.
But VAA is allowed 3.3V in Table-2. I think the "Analog Power Supply" contains not only 5V but also 3.3V.
Is it true ?
2. About decoupling for VREF pin.
In the ADV7123 datasheet(Rev.D), I can see following description in P.18 reference input section.
"The VREF pin is normally terminated to VAA through a 0.1uF capacitor"
ADV7125 should be same connection ?
ADV7125 should not be connected to GND through 0.1uF capacitor ?
I saw "https://ez.analog.com/message/165693#165693" and there is following comment.
"The compensation loop is referenced to Vaa so the comp cap needs to be tied to Vaa."
I assume that this comment describes about VREF pin.
It is true ?