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Supply voltage for ADV7125 and decoupling of VREF pin

Hello,

I have two questions about ADV7125.

1. The VAA pin is described "Analog Power Supply(5V +/-5%)." in table-6 ,datasheet.

   But VAA is allowed 3.3V in Table-2. I think the "Analog Power Supply" contains not only 5V but also 3.3V.

   Is it true ?

2. About decoupling for VREF pin.

   In the ADV7123 datasheet(Rev.D), I can see following description in P.18 reference input section.

     "The VREF pin is normally terminated to VAA through a 0.1uF capacitor"

   ADV7125 should be same connection ?

   ADV7125 should not be connected to GND through 0.1uF capacitor ?

   I saw "https://ez.analog.com/message/165693#165693" and there is following comment.

     "The compensation loop is referenced to Vaa so the comp cap needs to be tied to Vaa."

   I assume that this comment describes about VREF pin.

   It is true ?

Regards,

ysuzuki

  • 1) The ADV7123 is spec'd at either 5V or 3.3V power rails.

    2) Vref should normally have 1.235V on it generated by an AD1580,  See the schematic in the data sheet

    The same applies to the ADV7125.  The linked thread refers to the Comp pin which should be decoupled to Vaa

  • Hello GuenterL,

    Thank you for your support.

    > 1) The ADV7123 is spec'd at either 5V or 3.3V power rails.

    I understood ADV7125 is as same as ADV7123 about supply voltage.

    > 2) Vref should normally have 1.235V on it generated by an AD1580,  See the schematic in the data sheet The same applies to the ADV7125.

    I'm sorry, I'd like to know terminal treatment of VREF pin when using internal reference.

    For SAR ADC, ADI recommend to use large and low ESR capacitor as a decoupling capacitor to improve ENOB in AN-931.

    So I think low ESR capacitor will be better between VREF and GND.

    Could you give me your advice ?

    Best regards,

    ysuzuki

  • Yes, A 10uF plus 100nF very close to the pin will work.  However power supply and ground noise might still couple in.  This is why the reference schematics use the AD1580.

  • Hi

    This might be repeated question.

    What is ADI recommended chircuit about ADV7123/7125 VREF pin when internal reference used?

    0.1uF decoulping to VAA was mentioned in the schematic of old datasheet and P18/24 of the latest datasheet

    but 1uF decoulping to GND when external ref(AD1580) used.

    Latest datasheet saying

    REFERENCE INPUT

    The ADV7123 contains an on-board voltage reference. The VREF pin is normally terminated to VAA through a 0.1 μF capacitor. Alternatively, the part can, if required, be overdriven by an external 1.23 V reference (AD1580).

    Regards,

    Tomoto

  • Either cap will do.  The intention is to provide some ceramic cap filtering to lower the noise a bit.  The cap is not meant as an energy storage device.  If you check the Q's of both ceramic cap values you will notice that they overlay a lot.