I would like to evaluate the ADV7850 as an HDMI target for I/O testing. The
schedule is fairly aggressive, so I will put forth some questions.
1. When do you expect this part to be at EOL status?
2. Is there an upgraded part on the roadmap that will support the 600-MHz
maximum pixel clock rate of HDMI 2.0?
3. I noticed that the datasheet is missing information on the CRC functionality
mentioned in an application note. Can the frame checker be configured over the
DDC, or will this have to be done over the internal I2C or SPI bus?