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ADV7513 Video Clock

Hello,

I need some help in understanding the function of the video input clock CLK (Pin 53). Which pins and signals are supported by this clock? Regarding the description and functional block diagram in the datasheet it looks like CLK is for 24Bit color D[23:0] and HSYNC/VSYNC/DE at the same time. If this is correct so far, would it then fit with the output of an deserializer as the Max9276?

What im trying to do is to send HDMI data as RGB 24Bit color depth serialized from the output of ADV7619, deserialize it on the receiver side with Max9276 and convert it back into an HDMI signal with ADV7513. Therefore i would like to know if the output of Max9276 is compatible with the input of ADV7513.

Thanks for any helpful advice.

Best regards

Stell

MAX9276-MAX9280.pdf

For the ADV7513 the CLK pin is the pixel clock used by the input pixel bus.  This bus can be 24/16/8 bits wide in RGB or YCbCr color space as shown in the programming guide tables 16 - 21.  THe ADV7513 serializes the incoming parallel pixel bus to TMDS signals


The ADV7619 does the inverse, it de-serializes the TMDS video stream to a parallel pixel bus.


The maxim part de-serializes video over coax into a parallel video stream.  Just a quick look at it's data sheet I'd connector 9276 -> ADV7513, PPCLK ->  CLK, DOUT -> D[23:0]

  • Thanks for your quick response.

    I will wait for the answer of the maxim support regarding this issue, but it seems to me that it should work this way.

    In best case it is really that simple as you described it with the connection of the two buses and clocks of the deserializer and ADV7513.

    We will see what i can find out and at the latest when i connect the Evalboards there will be a more clear result.

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