ADV7401.  LLC clock is ~28MHz and should be 108MHz.

Hi,

We’re having  trouble with the ADV7401.  The LLC clock is ~28MHz which is wrong (should be around 108MHz).

Design Info:

  • We are inputting RGB 1280x1080 60Hz Sync-on-Green.
  • We are using an external clock (28.68686MHz, +3.3V)
  • We are doing 24-bit RGB 4:4:4 Digital output

 

Please review the custom register settings below and advise and any potential issues.  Register settings are based on PG325 of the ADV7401 Manual

/*VP*/
{0x0F, 0x80}, /*Reset the device*/

/*VP*/
{0x04, 0x4D}, /*Enable sync output*/
       
{0x05, 0x02}, /*PRIM_MODE = 010b for GR*/
   
{0x06, 0x05}, /*VID_STD=0101b for 1280x1024 @ 60v*/
      
{0x1D, 0x47}, /*Enable 28.63636 MHz crystal*/

/*VP*/
{0x3A, 0x21}, /*Disable ADC 3 and forces LLC range to 55-111Mhz*/

/*VP*/
{0x13, 0x04}, /*TTL Level CLK*/
        
{0x3B, 0x80}, /*Enable External Bias*/

/*VP*/
{0x3C, 0xB5},
  
{0x6A, 0x00}, /*DLL Phase Adjust Select Phase 0*/

/*VP*/
{0x6B, 0x82}, /*Enable DE on the field pin and 24-bit RGB output*/

/*VP*/
{0x73, 0x10}, /*Set auto gain*/
    
{0x7B, 0x1D}, /*Turn off EAV and SAV Codes. Set BLANK_RGB_SEL.*/
       
{0x85, 0x03}, /*Enable DS_OUT*/
          
{0x86, 0x0B}, /*Enable STDI Line Count Mode*/
          
{0xF4, 0x3F}, /*Max Drive Strength*/

/*VP*/
{0xC3, 0x31}, /*ADC Mux*/

/*VP*/
{0xC4, 0xC2}, /*ADC Mux + SOG enable*/
          
{0x0E, 0x80}, /*ADI recommended sequence*/
          
{0x52, 0x46}, /*ADI recommended sequence*/
          
{0x54, 0x00}, /*ADI recommended sequence*/
          
{0x0E, 0x00}  /*ADI recommended sequence*/

Additionally, we were unable to get RGB 1280X1080 with an external digital HS, VS to work with the default register settings in the manual.

Also, I noticed the user manual is dated Jan 2007.  Do any errata exist?

Thx.

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