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Noise in the DVI Output of ADV7511W

Hi,

We are using ADV7511WBSWZ for DVI Output in our board. The set up is as shown in the attached image.

The cables used for connection are shielded.

We have observed that, there are white blinking dots on the output (On Monitor).

We tried to display only one primary color(any of the three) bar on the screen, with darker color the dots are not visible, but with lighter shades of the same color( with mix of other two primary color) dots are visible.

Have anyone have come across this kind of issue ?

Please help us to solve this issue ASAP.

Thanks & Regards,

Nanjunda M

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  • FormerMember
    0 FormerMember
on Jun 3, 2016 6:14 PM

I'm glad this is a simple design

1) Lets look at the FPGA to ADV7511 connection first.

     a) Try, if possible, different FPGA drive strengths.  Our ADV7842 has 3 different levels which we sometimes have to tweak depending on the board. This allows the drivers to more closely match the board impedance.

     b) Try, if possible, different clock to data phase relationships.  The ADV7842 has 16 different phase clock to data setting.  Depending on the board we've had to tweak the phase delay to match properly.  See https://ez.analog.com/message/89211#comment-89211

2)  I assume the ADV7441 and ADV7511 power decoupling is clean and done similar to the reference designs.  Noise can be injected due to weak/poor decoupling.

3) Since the noise appears to be static, if the noise was on the input to analog section you should be able to scope it out and see it on the analog input signals.

4) Is there anyway you can go directly from card 14 to a monitor and bypass the cables.  I'd like to totally eliminate the 2.5 meter run for testing.

5) Is there away to ground out the analog inputs on the cable and just have the FPGA generate a solid color?  I want to see if the analog input is coupling noise into the TMDS signals or vice versa.

6) What format are you running at.  I looked at the cable data sheet and it does not specify the max DVI format it is spec'd for.  inter-pair skew looks kind of high but depends on the format timing.

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  • FormerMember
    0 FormerMember
on Jun 3, 2016 6:14 PM

I'm glad this is a simple design

1) Lets look at the FPGA to ADV7511 connection first.

     a) Try, if possible, different FPGA drive strengths.  Our ADV7842 has 3 different levels which we sometimes have to tweak depending on the board. This allows the drivers to more closely match the board impedance.

     b) Try, if possible, different clock to data phase relationships.  The ADV7842 has 16 different phase clock to data setting.  Depending on the board we've had to tweak the phase delay to match properly.  See https://ez.analog.com/message/89211#comment-89211

2)  I assume the ADV7441 and ADV7511 power decoupling is clean and done similar to the reference designs.  Noise can be injected due to weak/poor decoupling.

3) Since the noise appears to be static, if the noise was on the input to analog section you should be able to scope it out and see it on the analog input signals.

4) Is there anyway you can go directly from card 14 to a monitor and bypass the cables.  I'd like to totally eliminate the 2.5 meter run for testing.

5) Is there away to ground out the analog inputs on the cable and just have the FPGA generate a solid color?  I want to see if the analog input is coupling noise into the TMDS signals or vice versa.

6) What format are you running at.  I looked at the cable data sheet and it does not specify the max DVI format it is spec'd for.  inter-pair skew looks kind of high but depends on the format timing.

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