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(ADV7511W)I have some question about CEC line and the schematic.

Hi !

I have some questions about CEC line.

1)

Is there any specification for the CEC line frequency?

If there any specification, can you teach where it is written?

2)

If our customer use ADV7511W with CEC line, 

do the customer need to adjust CEC line frequency between HDMI-RX & HDMI-TX?

3)

If it is difficult to answer No.1~2 , 

can you tell me the ADV7511W-Eval board can pass the HDMI compliance test with CEC line?

We want to know this because it is the first experience for us and also for the customer to use CEC line.

So if you can give some advice about this, it will help us very much.

4)

At ADV7511W's Hardware Users Guide P43, you said, 

"For a complete set of reference schematics and PCB layout example, contact ATV_VideoTX_apps@analog.com."

Is this EVAL board schematics and PCB layout?

Or is it different?

Also is there any terms to get this documents?

Best regards.

Kawa

  • Hi GuenterL

    Thank you for your fast reply.

    1)

    I understood.

    2)

    I understood.

    Anyway, I will say to our customer to read HDMI specification.

    3)

    I have ADV7611-ADV7511 EVAL board.

    Also I was reading ADV7511 EVAL board schematic which is attached at here.

    ADV7511W Design Support Files 

    4)

    I understood.

    So can EVAL-7842-7511 pass the HDMI-Tx certification?

    Best regards,

    Kawa

  • 1) HDMI authorities control CEC specifications.  Please visit their site for specification information

    2) CEC is independent of the ADV7511W.  The ADV7511 monitors the CEC lines for specific commands to send back to the local processor for processing.

    3) Which ADV7511W evaluation board do you have?  The EVAL-ADV7842-7511 are designed per CEC specifications

    4) For reference schematic I would look at the EVAL-7842-7511 board.  AdvantivTm EVAL-ADV7842-7511 Video Evaluation Board 

  • Hi GuenterL

    I have few questions about ADV7511W.

    4)

    So can EVAL-7842-7511 pass the HDMI-Tx certification?

    5)

    At the Programming Guide it is written that CEC_CLK can receive 3MHz-100MHz.

    It means our customer can use 3MHz-100MHz crystal.

    Is this understanding correct?

    6)

    Table 82 is one of the register setting when customer use 3MHz crystal?

    Table 83 is one of the register setting when customer use 13.5MHz crystal?

    Table 84 is one of the register setting when customer use 27MHz crystal?

    7)

    Is there any way to calculate the register setting when our customer using other crystal?

    I mean there is 3 tables(Table 82-84) but there is no table for 12MHz.

    For example , when our customer use 12MHz or other crystal,

    how can they know how to set up each register?

    Best regards.

    Kawa

  • Hi GuenterL!

    Thank you for your kindly help.

    Your advice help us and our customer very much!!

    4)

    I understood.

    5)

    So you mean CEC_CLK block don't have any PLL.

    ADV7511W will use XTAL clock frequency directly.

    Is my understanding correct?

    8)

    Sorry I'm little bit confused.

    As ADI wrote at Programming guide 4.8.7,  normally customer should use 12MHz xtal.

    If they want to use other XTAL, they have to get "CEC Clock Timing Calculator" from ADI.

    Is this correct?

    9)

    Table82 and table83 and Table84 are the case when the users use

    3MHz or 13.5MHz or 27MHz xtal.

    Is this correct?

    I pulled secton 4.8.7 from ADV7511W Programming guide.

    ADV7511W Design Support Files 

    Best regards.

    Kawa

  • 4) this board was designed for CEC certification however we have not run it thorough any official tests.

    5) CEC is similar to I2C.  The 'CEC_CLK' for the ADV7511 is really the crystal input.  No place to apply a CEC_CLK.  CEC timing would be based on the crystal.   

    5,6&7) The CEC_CLOCK is related to the bit timing and where the bit samples are taken.  See CEC 5.2 specification.

    For the ADV7511 the CEC_CLK is 760kHz. 

    Which exact Programming Guide did you pull section 4.8.7 from so I can go look at it.

    CECAppNote.pdf
  • Hi GuenterL

    Thank you for your fast reply.

    5)

    With my understanding , CEC_CLK is made by external Xtal.

    And the CEC line frequency should targeted to 750kHz.

    And to set up the register, the customer should enter the Xtal frequency to the spread sheet.

    And if the customer set up the register, CEC line will move at 750kHz.

    CEC_CLK pin is for the external CLK input and the user have to set up the register because CEC data will move with 750kHz.

    This means CEC_CLK pin has PLL or something inside.

    Is my understanding correct?

    Also which spread sheet are you saying?

    At the programming guide table 82-84 is not for generate the register setteing.

    8)

    You said 27MHz.

    Does this means the customer have to connect 27MHz Xtal to CEC_CLK pin?

    And if the customer use 27MHz Xtal, they should use Table 84 .

    Is my understanding correct?

    But at the ADV7511W Eval board, 12MHz Clock input is used.

    Is this correct? Or 27MHz is correct?

    ADV7511W Design Support Files 

    9)

    I  understood.

    Best regards.

    Kawa

  • 5) CEC_CLK is derived from the crystal.  In the spread sheet you need enter the crystal frequency.  All other register setting are generated from that and the targeted 750kHz CEC_CLK value.

    8) The ADV7511 uses the crystal to generate the CEC_CLK.  It must be 27MHz for other chip functions to operate so you are stuff with 27MHz for the spread sheet and related register values.

    9) in my opinion Table 82 and 83 should not even be there since the rest of the chip requires a 27 MHz crystal to operate.  Tables adds confusion.

  • Hi GuenterL

    Thank you for your reply.

    10)

    So, 750kHz is for the timing delays , setup hold and for others.

    750kHz is used inside ADV7511W and it is made from CEC_CLK input frequency.

    This means ADV7511W has some kind of frequency divider circuit.

    Is this correct?

    11)

    I want to confirm again.

    So the CEC_CLK input frequency is 3MHz-100MHz.

    Right?

    5)

    I understood that when ADV7511W is a CEC receiver, 750kHz made from CEC_CLK is used for the internal timing.

    So to calculate the right register setting by each Xtal, we need the spread sheet.

    I found the spread sheet at ADV7511W design support .

    So when the customer make the software, they have to chose the external clk input (CEC_CLK)

    and use the register setting from the spread sheet.

    Is this correct?

    Best regards.

    Kawa

    CEC_clock_timing_register_calculator-ADV7511-family.xls
  • CEC line will not move at 750kHz.  The timing delays, setup, holds and such at setup based on the 750kHz clock.  

    5) When the ADV7511 is a CEC receiver, is used to setup the sampling points for the CEC line that meet the setup, hold and delay times that are defined for the protocol.  It's not so much as a PLL but counters that set these various sampling points.  When the ADV7511 is a CEC transmitter, the CEC_CLK is used for BIT Timing per protocol.  If you use a 12MHz input than use the setting from the spread sheet

    6) I was looking at a different eval board.  12MHz will work, just use the right settings

  • Hi GuenterL!

    Thank you for your reply.

    I understood.

    Best regards.

    Kawa