Post Go back to editing

ADV7280 Problem

We are working with the ADV7280 and have this decoder on a PCB and connected to NTSC camera.


The problem we are trying to solve is we want to get both even and odd fields in a non-progressive mode into a single frame, one field followed by the other.  This way we get all of the image information in a single frame and we can de-interlace the image in our software.  We do not want the decoder to convert the image to a progressive scan image because this conversion is done by interpolating every other line, not by using actual image data.


Here are the setting we are using:

Keep in mind that these setting are for progressive mode. We want to change these to interlaced and display both fields in a single frame.


                  <!-- Configure ADV 7280 Analog to Digital Decoder -->

                  <!-- :Autodetect CVBS Single Ended In Ain 1, Parallel output BT656: -->

                  <Write Adapter="Service" SlaveID="40" Register="0F" Value="40" />     <!-- System Reset -->

                  <Delay Duration_ms="10" />     

                  <Write Adapter="Service" SlaveID="40" Register="0F" Value="00" /> <!-- System out of powerdown mode -->

                  <Write Adapter="Service" SlaveID="40" Register="00" Value="00" /> <!-- CVBS input on AIN1 -->

                  <Write Adapter="Service" SlaveID="40" Register="02" Value="04" /> <!-- Autodetect PAL B, PAL G, PAL H, PAL I, PAL D, NTSC J, SECAM  -->

                  <Write Adapter="Service" SlaveID="40" Register="0E" Value="80" />

                  <Write Adapter="Service" SlaveID="40" Register="9C" Value="00" />

                  <Write Adapter="Service" SlaveID="40" Register="9C" Value="FF" />

                  <Write Adapter="Service" SlaveID="40" Register="0E" Value="00" /> <!-- Enter user sub-map -->

                  <Write Adapter="Service" SlaveID="40" Register="03" Value="0C" /> <!-- Output signal drivers are enabled -->

                  <Write Adapter="Service" SlaveID="40" Register="6A" Value="10" /> <!-- HS pin outputs horizontal sync signal -->

                  <Write Adapter="Service" SlaveID="40" Register="32" Value="41" /> <!-- //C1 -->

                  <Write Adapter="Service" SlaveID="40" Register="6B" Value="11" /> <!-- VS pin outputs vertical sync signal, 0x11=VSYNC, 0x12=Field -->

                  <Write Adapter="Service" SlaveID="40" Register="04" Value="3C" /> <!-- Output format ITU-R BT.656-3 use 0x3C; BT.656-4 use 0xBC-->

                  <Write Adapter="Service" SlaveID="40" Register="13" Value="00" /> <!-- Detect 60Hz video -->

                  <Write Adapter="Service" SlaveID="40" Register="15" Value="00" /> <!-- Digital clamp (dc bias restore) response TC set to fast 0.1s  -->

                  <Write Adapter="Service" SlaveID="40" Register="17" Value="41" /> <!-- Select SH1 input filter -->

                  <Write Adapter="Service" SlaveID="40" Register="1D" Value="40" /> <!-- Enable pixel clock -->

                  <Write Adapter="Service" SlaveID="40" Register="37" Value="01" /> <!-- Pixel clock polarity not reversed -->

                  <Write Adapter="Service" SlaveID="40" Register="F4" Value="3F" /> <!-- IO Drive Strength (High Drive Strength) -->       

                  <Write Adapter="Service" SlaveID="40" Register="52" Value="CD" />

                  <Write Adapter="Service" SlaveID="40" Register="80" Value="51" />

                  <Write Adapter="Service" SlaveID="40" Register="81" Value="51" />

                  <Write Adapter="Service" SlaveID="40" Register="82" Value="68" />    

                  <!-- Enable de-interlacer -->

                  <Write Adapter="Service" SlaveID="40" Register="FD" Value="84" />

                  <Write Adapter="Service" SlaveID="84" Register="A3" Value="00" /> <!-- ADI Required Write [ADV7280 VPP writes begin] -->

                  <Write Adapter="Service" SlaveID="84" Register="5B" Value="00" /> <!-- Enable Advanced Timing Mode -->

                  <Write Adapter="Service" SlaveID="84" Register="55" Value="80" /> <!-- //0x80 = Interlaced to Progressive ON; 0x00 = interlaced-->


Attached are images we acquired for Progressive mode and for field sync interlaced mode (odd or even).


For progressive:

The image is interpolated by the decoder to add the missing lines on each frame received for even (one frame) and for odd (the next frame).

See Progressive.PNG attached.


Interlaced single field (odd or even):

The interlaced image is only one field, either the even or the odd field.  We would like to get both fields in a single image.

See Interlaced single field.PNG attached.
  • Hi,

    We are checking with Part specialist on this question.

    Best Regards,


  • Hello,

    Note it that the deinterlacer (I2P core) in the ADV7280 does work by interpolating between lines to generate progressive output videos. We do have an ADI proprietary algorithm that is intended to reduce low angle noise caused by the interpolation technique. The I2P core minimizes the delay through the system and is very easy to implement.  

    If you do not wish to use the deinterlacer (I2P core) in the ADV7280 then I advise that you do the following. Note this is more difficult to implement than the I2P core and will add a delay in your system.

    Implement a memory buffer in your receiver where you store two or more fields of video. You can then implement an algorithm that "stitches" these fields together to generate a progressive frame of video. This will add a delay on the video output.

    Note the ADV7280 can output fields that are shorter or longer than standard during locking and un-locking events. Therefore I advise that you implement a line counter algorithm that will count the number of lines of video in a field. This will prevent image artifacts and the memory buffer being overloaded.


    Robert Hinchy

    Applications Engineer,

    Analog Devices Inc.

  • Hello,

    I am the original requester for this issue above.

    I do not want the de-interlacer on. The algorithm messes up my image. 

    I do want a frame with both Odd and even field in it. I can then take that frame and fix and stitch the image to look correct.

    I need register settings for the decoder to do this.

    Thank you


  • Hi Sagi,

    By default the ADV7280 will output an odd field of video followed by an even field. *

    These fields are separated by EAV/SAV codes and vertical blanking periods. These is no way that the ADV7280's operation can be modified so that two fields are output together in a long field.

    * Note when the ADV7280 locks to an analog video source it will output whatever the video source is outputting. Therefore the first field outputted by the ADV7280 could be an even field, or it could be a field that is half the usual length.


    Robert Hinchy

    Senior Applications Engineer,

    Analog Devices Inc.

  • This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

    Thank you,
    EZ Admin