Hi ADI team,
I have recently completed a video decoder/encoder board using the ADV7181C and ADV7391, using an 8-bit interface.
I have already successfully tested the following signal path:
- CVBS (NTSC timing) -> ADV7181C -> ADV7391 -> RGB SoG
Now I would like to implement the reverse path:
- RGB SoG (NTSC timing) -> ADV7181C -> ADV7391 -> CVBS
My main question is regarding the ADV7181C CP configuration.
I understand that the ADV7181C Component Processor (CP) supports RGB input and can perform RGB to YCrCb color space conversion. However, I am having difficulty determining the correct register configuration to configure the CP output as 8-bit 4:2:2 YCrCb SDR.
Could you please advise how the ADV7181C should be configured for the following:
- RGB analog input with Sync-on-Green ( NTSC / 525i timing)
- RGB to YCrCb color space conversion
- 8-bit 4:2:2 YCrCb SDR output
- EAV/SAV embedded in the 8-bit output, if applicable
My final goal is to feed this 8-bit YCrCb 4:2:2 stream directly into the ADV7391 to generate CVBS.
If the CP cannot provide 8-bit 4:2:2 YCrCb SDR output for an RGB SoG input, is there any other way to achieve this using the ADV7181C? For example, could the RGB SoG input be handled using the SCART RGB configuration, or could the processed video from the CP be routed through another internal path to obtain the standard 8-bit output?
Any guidance on the recommended configuration or possible alternative signal paths would be greatly appreciated.
Thank you very much for your help.
