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Getting colour and sharpness issue with the output

Category: Software
Product Number: ADV7181DBCPZ-RL

Hi, 

We are facing colour issue with ADV7181 chip. Thses are the following specifications

Input to ADV7181 :- STANAG 3350 Class C 525 lines @ 30 fps (based on NTSC RS-170A)

Output :- 12bit 444 RGB mode

Input display:-

Output Display:-

In our schematic, AIN 1, AIN 6 and AIN 4 are grounded. While we have connected AIN 3 for blue, AIN 5 for red and AIN 2 for green with sync (SOG).

Register set used :-
(0x21, 0x05, 0x02)
(0x21, 0x06, 0x00)
(0x21, 0xC3, 0x31)
(0x21, 0xC4, 0xC2)
(0x21, 0x3A, 0x10)
(0x21, 0x67, 0x00)
(0x21, 0x68, 0x00)
(0x21, 0x3C, 0x5A)
(0x21, 0x8A, 0x80)
(0x21, 0x77, 0x80)
(0x21, 0x78, 0x00)
(0x21, 0x79, 0x00)
(0x21, 0x7A, 0x00)
(0x21, 0x73, 0x00)
(0x21, 0x7B, 0x01)
(0x21, 0x6A, 0x10)
(0x21, 0x6B, 0xC4)
(0x21, 0xC9, 0x08)
(0x21, 0xDF, 0x00)
(0x21, 0xC0, 0x00)
(0x21, 0xC1, 0x00)
(0x21, 0xC2, 0x00)
(0x21, 0xF3, 0x0F)
(0x21, 0x85, 0x1B)
(0x21, 0x1D, 0x40)
(0x21, 0x6C, 0xC5)
(0x21, 0x6D, 0x5F)
(0x21, 0x6E, 0x57)
(0x21, 0x6F, 0xF5)
(0x21, 0x70, 0x3F)
(0x21, 0x87, 0x94)
(0x21, 0x88, 0x00)
(0x21, 0x7C, 0x60)
(0x21, 0x7E, 0x00)

Could you please let me know if any changes in register set is required to get the proper output?

Thanks,

With regards

Parents
  • Hi, 

      Please crosscheck with below register configuration and let us know the update,

      Also, kindly let us know whether this is a new design or an existing design, as the ADV7181D is not recommended for new designs (NRND).

    42 3C 53
    42 6B 84
    42 F4 3B
    42 73 F0 ; Enable Manual Gain and set CH_A gain
    42 74 0C ; Set CH_A and CH_B Gain
    42 75 03 ; Set CH_B and CH_C Gain
    42 76 00 ; Set CH_C Gain
    42 77 04 ; Set offset to 64d
    42 78 01 ; Set offset to 64d
    42 79 00 ; Set offset to 64d
    42 7A 40 ; Set offset to 64d
    42 7B 1D ; Turn off EAV and SAV Codes. Set BLANK_RGB_SEL.
    42 B7 1B ; ADI Recommended
    42 0E 80 ; ADI recommended sequence
    42 52 46 ; ADI recommended sequence
    42 54 80 ; ADI Recommended Setting
    42 F6 3B ; ADI Recommended Setting
    42 0E 00 ; ADI recommended sequence

    Thanks,

    Poornima S

  • Hi,

    We have incorporated the above-mentioned registers, as provided by you, into our register set. However, we are currently not receiving any output.

    Please find below the final register set that we are using:

    (0x21, 0x05, 0x02)
    (0x21, 0x06, 0x00)
    (0x21, 0xC3, 0x31)
    (0x21, 0xC4, 0xC2)
    (0x21, 0x3A, 0x10)
    (0x21, 0x67, 0x00)
    (0x21, 0x68, 0x00)
    (0x21, 0x3C, 0x53)
    (0x21, 0x8A, 0x80)
    (0x21, 0x77, 0x04)
    (0x21, 0x78, 0x01)
    (0x21, 0x79, 0x00)
    (0x21, 0x7A, 0x40)
    (0x21, 0x73, 0xF0)
    (0x21, 0x7B, 0x1D)
    (0x21, 0x6A, 0x10)
    (0x21, 0x6B, 0x84)
    (0x21, 0xC9, 0x08)
    (0x21, 0xDF, 0x00)
    (0x21, 0xC0, 0x00)
    (0x21, 0xC1, 0x00)
    (0x21, 0xC2, 0x00)
    (0x21, 0xF3, 0x0F)
    (0x21, 0x85, 0x1B)
    (0x21, 0x1D, 0x40)
    (0x21, 0x6C, 0xC5)
    (0x21, 0x6D, 0x5F)
    (0x21, 0x6E, 0x57)
    (0x21, 0x6F, 0xF5)
    (0x21, 0x70, 0x3F)
    (0x21, 0x87, 0x94)
    (0x21, 0x88, 0x00)
    (0x21, 0x7C, 0x60)
    (0x21, 0x7E, 0x00)

    (0x21, 0xF4, 0x3B)
    (0x21, 0x74, 0x0C)
    (0x21, 0x75, 0x03)
    (0x21, 0x76, 0x00)
    (0x21, 0xB7, 0x1B)
    (0x21, 0x0E, 0x80)
    (0x21, 0x52, 0x46)
    (0x21, 0x54, 0x80)
    (0x21, 0xF6, 0x3B)
    (0x21, 0x0E, 0x00)

    We would also like to clarify one point regarding the register configuration. For offset 0x0E, both data values 0x80 and 0x00 are assigned at different points in the sequence.

    Could you please confirm whether this configuration is correct and whether the register at offset 0x0E is expected to be written twice with these values?

    Additionally, since we are not receiving the output with the above configuration, we would appreciate it if you could review the register sequence and confirm whether any changes are required.

    Thanks and regards

Reply
  • Hi,

    We have incorporated the above-mentioned registers, as provided by you, into our register set. However, we are currently not receiving any output.

    Please find below the final register set that we are using:

    (0x21, 0x05, 0x02)
    (0x21, 0x06, 0x00)
    (0x21, 0xC3, 0x31)
    (0x21, 0xC4, 0xC2)
    (0x21, 0x3A, 0x10)
    (0x21, 0x67, 0x00)
    (0x21, 0x68, 0x00)
    (0x21, 0x3C, 0x53)
    (0x21, 0x8A, 0x80)
    (0x21, 0x77, 0x04)
    (0x21, 0x78, 0x01)
    (0x21, 0x79, 0x00)
    (0x21, 0x7A, 0x40)
    (0x21, 0x73, 0xF0)
    (0x21, 0x7B, 0x1D)
    (0x21, 0x6A, 0x10)
    (0x21, 0x6B, 0x84)
    (0x21, 0xC9, 0x08)
    (0x21, 0xDF, 0x00)
    (0x21, 0xC0, 0x00)
    (0x21, 0xC1, 0x00)
    (0x21, 0xC2, 0x00)
    (0x21, 0xF3, 0x0F)
    (0x21, 0x85, 0x1B)
    (0x21, 0x1D, 0x40)
    (0x21, 0x6C, 0xC5)
    (0x21, 0x6D, 0x5F)
    (0x21, 0x6E, 0x57)
    (0x21, 0x6F, 0xF5)
    (0x21, 0x70, 0x3F)
    (0x21, 0x87, 0x94)
    (0x21, 0x88, 0x00)
    (0x21, 0x7C, 0x60)
    (0x21, 0x7E, 0x00)

    (0x21, 0xF4, 0x3B)
    (0x21, 0x74, 0x0C)
    (0x21, 0x75, 0x03)
    (0x21, 0x76, 0x00)
    (0x21, 0xB7, 0x1B)
    (0x21, 0x0E, 0x80)
    (0x21, 0x52, 0x46)
    (0x21, 0x54, 0x80)
    (0x21, 0xF6, 0x3B)
    (0x21, 0x0E, 0x00)

    We would also like to clarify one point regarding the register configuration. For offset 0x0E, both data values 0x80 and 0x00 are assigned at different points in the sequence.

    Could you please confirm whether this configuration is correct and whether the register at offset 0x0E is expected to be written twice with these values?

    Additionally, since we are not receiving the output with the above configuration, we would appreciate it if you could review the register sequence and confirm whether any changes are required.

    Thanks and regards

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