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ADV7511 Sync Output Polarity Control

Thread Summary

The user is confused about the sync signal output polarity control of the ADV7511 when Sync Adjustment Register (0x41[1]) is disabled. The final answer confirms that 0x17[6:5] = 2'b00 results in pass-through polarity, while 2'b11 inverts the polarity. For 0x41[1] = 0, the settings 0x17[6:5] = 2'b00 and 2'b11 are correct for maintaining and inverting the input sync polarity, respectively.
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Category: Datasheet/Specs
Product Number: ADV7511


Hi all,

I am having some confusion regarding the sync signal output polarity control of the ADV7511 and would appreciate your help.

For my application using the ADV7511, I need to invert the polarity of the output sync signals.

However, in the ADV7511 Programming User Guide Rev. G, page 157, Register 0x17, the descriptions for Bit[6] Vsync Polarity and Bit[5] Hsync Polarity appear inconsistent when Sync Adjustment Register (0x41[1]) = 0 (Case 2).

I found the following two different descriptions:

0 = sync polarity pass through
1 = sync polarity invert


and

0 = High polarity
1 = Low polarity

This has caused some confusion.

(1)

For Case 2 (0x41[1] = 0), do you think the following description is a typo?

0 = High polarity
1 = Low polarity

(2)

My current settings are:

0x17[6:5] = 2'b00
0x41[1] = 0


With these settings, the behavior is as follows:

Negative-polarity VSYNC input → Negative-polarity VSYNC output
Negative-polarity HSYNC input → Negative-polarity HSYNC output

If I change the settings to:

0x17[6:5] = 2'b11
0x41[1] = 0


will the behavior become:

Negative-polarity VSYNC input → Positive-polarity VSYNC output
Negative-polarity HSYNC input → Positive-polarity HSYNC output

Could you please confirm whether this understanding is correct?

Thank you in advance for your support.

Best regards,

aimPoint

  • Hi,

      Please find the response below ,

    For Case 2 (0x41[1] = 0), do you think the following description is a typo?

      0 = High polarity
      1 = Low polarity

     Sync Adjustment Disabled:

         When sync adjustment register is disabled 0x41[1]=0, then ADV7511 does not generate any syncs. It either passthrough the input or inverts it.

      Please refer below timing diagram for reference,

    a. 0x17[6] = '0'(Passthrough) , Output polarity = Input polarity.

    b. 0x17[6] = '1'(Invert) , Output polarity = Opposite of Input polarity.

    Sync Adjustment Enabled:

        However when sync adjustment register is enabled 0x41[1]=1, ADV7511 internally regenerates the syncs. Here, 0x17[6] directly selects the polarity.

    0x17[6]=0 (Force Active high)Regardless of the input polarity, the regenerated VSYNC is active high.

    0x17[6]=1 (Force Active low)Regardless of the input polarity, the regenerated VSYNC is active low.

    Could you please confirm whether this understanding is correct ?

        Yes, the settings which related to "0x17[6:5] = 2'b00"  & "0x17[6:5] = 2'b11" are expected one.

    Thanks,

    Poornima S

  • Hi  Poornima-san 

    Thank you for your reply. It was very helpful.

    Best regards.

    aimPoint

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