I am currently considering a system architecture using the ADV7611 HDMI receiver, and I would like to confirm whether the proposed solution is technically feasible.
The system concept is as follows:
1. The video data output from an NVIDIA® Jetson AGX Orin
64GB Developer Kit is transmitted through the HDMI port.
2. The HDMI signal is received by the ADV7611 and converted to a parallel video interface.
3. The parallel video output from the ADV7611 is connected to the HP bank(1.8V) of an AMD/Xilinx FPGA, specifically the XC7Z030-FFG676 device.
4. The intended video format is 24-bit RGB or YCbCr parallel video.
5. The FPGA then processes or forwards the projection data to a DLP chipset consisting of DLPC3478 + DLP3010 + DLPA3005, so that the system can generate projected beam output.
Based on this architecture, I would like to ask the following questions:
1. Is the ADV7611 suitable for receiving HDMI video from the NVIDIA Jetson AGX Orin Developer Kit and outputting 24-bit RGB or YCbCr parallel video to an FPGA?
2. Are there any known compatibility issues, timing limitations, or configuration considerations when interfacing the ADV7611 parallel video output with an AMD/Xilinx XC7Z030 FPGA HP bank?
3. Are there any specific recommendations regarding pixel clock, video format, color space, or output bus configuration for this type of HDMI-to-parallel-FPGA application?
4. Could you please advise whether this overall solution is reasonable, or if there are any major technical risks that should be considered during the design stage?
