Category: Hardware
Product Number: max96712
While reading the MAX96712 registers, I confirmed that video_lock and pipe_lock are both set. However, after enabling CSI_OUT (0x40B-bit2), the SOC side does not receive any bus data. Using an oscilloscope to probe the CSI bus, I observed waveforms on D0 ~ D3, but the CLK bus remains constantly low. I attempted to set force_csi_out_en (0x8A0-bit7), but the result remains the same. Reading registers 0x8D0~0x8D3 shows that the data is continuously toggling.
The waveforms for D0：
CLK are shown below：
Do you have any troubleshooting suggestions for this issue?
