Hello, I'm running into an issue while outputting PAL to a VM700T.
To start, is there any way to control the subcarrier frequency insertion? It seems like the subcarrier frequency is inserted whenever the AD724 gets a csync indicative of a horizontal sync, however during vertical blanking there are a few lines where I do not want the subcarrier frequency, but it shows up anyways.
My second question has to do with subcarrier frequency phase. I am measuring SCH Phase on a VM700T and what I am getting out from the AD724 is a consistently moving target. It is like the PAL phase lock functionality is not working or is working erroneously.
For further information, this AD724 is driven by a ADV7125. An external 17.734480 MHz clock is used as a pixel clock and is also fed into the Fin input of the AD724.
Please advise.
