ADV7610
Recommended for New Designs
The ADV7610 is offered in professional (no HDCP) and industrial versions. The operating temperature range is −40°C to +85°C.
The ADV7610 is a high...
Datasheet
ADV7610 on Analog.com
Hi Katsuya San,
Apologies for the delayed response.
Please note that, Jitter specification is not mentioned in the ADV7610 design support file manuals but ADV7610 is designed to meet HDMI specifications. Normally the ADV7610 is placed close to the PCB incoming connector resulting in minimal attenuation or distortion caused by the board.
The HDMI TDR spec. includes the signal distortion caused by the HDMI connector. In general long cable runs will attenuate the signal more then anything happening on the board.
Kindly refer to the FAQ below for the layout. Here, the expert provides general guidelines for laying out HDMI traces on circuit boards.
Also, Here you'll see we're using RClamp0524 diode to protect the HDMI lines. These ESD diodes don't affect the HDMI signals. There are many ESD protection devices available now.
Kindly note that, LLC jitter may related due to layout and power supply stability and layout could be marginal.
Also refer this pdf http://www.t-es-t.hu/download/analog/an1166.pdf
Thanks,
Poornima S
Thank you for reply.
Accoring to the statement that "ADV7610 is designed to meet HDMI specifications." TMDS clock jitter is 0.3Tbit that is about 200ps, so idelal LLC jitter is about 200ps at min, am I right?
I would like to know if there are any electrical factors within the ADV7610 that inevitably worsen jitter when creating an LLC from the TMDS clock.
If there are none, it seems that the jitter from the TMDS input clock would be transmitted almost unchanged to the output. Is this correct?
I understand that this argument includes the ideal power supply and PCB tracing.
Thank you for reply.
Accoring to the statement that "ADV7610 is designed to meet HDMI specifications." TMDS clock jitter is 0.3Tbit that is about 200ps, so idelal LLC jitter is about 200ps at min, am I right?
I would like to know if there are any electrical factors within the ADV7610 that inevitably worsen jitter when creating an LLC from the TMDS clock.
If there are none, it seems that the jitter from the TMDS input clock would be transmitted almost unchanged to the output. Is this correct?
I understand that this argument includes the ideal power supply and PCB tracing.