Query on Black bands seen with ADV7281

Hi,

 By default, the ADV728x will output in 'ITU BT656-3' timing format .If the receiver chip is expecting 'ITU BT656-4' format then this can result in 10 more dark lines appearing at the top of the screen in NTSC mode. 

This is because 'ITU BT656-3' format has 10 more lines of vertical blanking than 'ITU BT656-4' format. 

Also if you have not tried '0x04[7]' bit, then program the ADV728x to output in 'ITU BT656-4' format (Set User Map, register 0x04 bit[7] to 1).

Kindly check ADV728x hardware manual for more information: http://www.analog.com/media/en/technical-documentation/user-guides/ADV7280_7281_7282_7283_UG-637.pdf

Thanks,

Poornima

Hello Poornima,

Thank you for the quick response.

Yes, we have already attempted the above suggestion in parallel setting register 0x04 bit[7] to 1. This adjustment has helped reduce the number of black lines at the top from 22 to 2. However, the black lines at the bottom and on the right side remain unchanged.

Additionally, we have the following queries:

1) How can we eliminate the horizontal black bands at the top and bottom?
  a. If removal is not possible, is there a way to shift the black band entirely to the bottom?
2) How can we completely remove the vertical black band on the right side?

Hello Poornima,

I'm the team mate of the author.

We have verified the source by directly connecting it to a monitor (No ADV7281 involved). No black lines seen vertical or horizontal.

Its clear that ADV7281 is inserting the horizontal black line to be complaint to ITU-BT656 standard.

Our customer wants the horizontal black lines removed or make it symmetric.

In additional we still dint understand why the vertical black like is inserted by ADV7281.

Please support us!

Hi ,

    Could you please provide the detailed setup information?

Thanks,

Ebin

Hello Ebin

Thanks for the reply.

Currently we are using this External Monitor which is connected to the DVR Module

https://www.amazon.co.jp/Antion-4-3%E3%82%A4%E3%83%B3%E3%83%81%E3%83%A2%E3%83%8B%E3%82%BF%E3%83%BC-…

Thank You

Akash

Hi Akash,

    Thanks for the information. Could you please check the video output by enable the free run option in 0x0c[0] and let us know the status?

Thanks,
Ebin

Hello Ebin,

We are not observing any black bands in the free run mode.
Used 0x0C[bit 0](DEF_VAL_EN) = 1 to force free-run mode on and could observe the default solid blue frame without any black borders

Hi Rajendraprasad,

Thank you for your response. Please let us know the status of the output with the following configuration checks:

1. Please try using a different source.
2. Ensure that during power-up, the reset pin is held low for at least 5 ms after the 3.3 V, 1.8 V, and power-down lines go high. After the reset pin goes high, wait at least 5 ms before starting I2C communication.
3. Try toggling the polarity bit in register 0x37 to see if the edge issue disappears, and also modify registers 0xE5 to 0xEA.
4. Write 0x00 to User Sub Map 2, register 0x84.

Thanks,
Ebin

Hi  Ebin 

1. Please try using a different source.

we are not able to verify with other source as we don't have any other source with compatible connector

2. Ensure that during power-up, the reset pin is held low for at least 5 ms after the 3.3 V, 1.8 V, and power-down lines go high. After the reset pin goes high, wait at least 5 ms before starting I2C communication.

We have verified that during power-up, the reset pin is held low for at least 5 ms after the 3.3 V, 1.8 V, and PWRDN lines go high.
After the reset pin is released, we also wait an additional 5 ms before initiating any I²C communication.

3. Try toggling the polarity bit in register 0x37 to see if the edge issue disappears, and also modify registers 0xE5 to 0xEA.

We tried toggling the different combinations of polarity bit in register 0x37, but the black bars are still present.

We modified the registers in the 0xE5–0xE7 range, but there was no visible change in the black band issue.

Enable the 0X31 Register VS/FIELD Control 1 for registers 0xE5 to 0xEA

VS/FIELD Control 1   0x31 00010010 [ 0x12 ]

NTSC VSYNC begin   0xE5 11000101 [ 0xc5]

NTSC VSYNC end       0xE6 11000100 [ 0xc4 ]

NTSC FIELD toggle     0xE7 11000011 [ 0xc3 ]

we didn't tried from E8 to EA because these are related to PAL Standard

4. Write 0x00 to User Sub Map 2, register 0x84.

We wrote 0x00 to register 0x84 as suggested.
However, the black band is still observed, and the issue persists.

Thanks,
Akash

Hi Akash,

    Thanks for your confirmation .

Can you please confirm the below points ?

    1. We understand that the output of the ADV7821 is 720×253 and 720×254 frames, which is the correct resolution for the BT.656-3 480i format. This signal is provided to the SoC, but the output on the monitor shows black bands. Please verify whether the SoC is configured correctly.
2. In NTSC mode, the ADV728x outputs a 60 Hz refresh rate. Could you check whether your display supports 60 Hz, or is it limited to 50 Hz?

Thanks,
Ebin

Hello Ebin,

Thanks for your response.

We do not suspect the SoC, as we also observe the black bands when dumping the raw buffer output from the ADV7281.

As mentioned earlier(on Nov 18, 2025 2:19 PM), modifying to ITU BT.656-4, which outputs 720×243 and 720×244 frames, reduces the number of black lines at the bottom from 22 to 2.

Based on this, we suspect that the ADV7281 is adding black lines to the source video (480i [720x480]). Specifically:

- Using BT.656-3, 480i after de-interlacing becomes 720x507. Here, we observe 27 horizontal black lines (22 at the top and 5 at the bottom) with a 720x480 video source (507 - 480 = 27).
- Using BT.656-4, 480i after de-interlacing becomes 720x487. Here, we observe 7 horizontal black lines (2 at the top and 5 at the bottom) with a 720x480 video source (487 - 480 = 7).

Additionally, we observe 5 vertical black lines on the right side, which suggests that the input video frames are cropped, resulting in data loss.

We would like your assistance in understanding how to avoid or mitigate these black lines.

Hi ,
We have suggested the following response to the customer:
   The SoC can Crop the extra black lines on the vertical dimension and Horizontal dimension. We suggested they can simply start processing at line 23 and stop 5 lines before frame end on the vertical dimensions and crop the extra black lines crop 720 to 704 on the Horizontal dimension .ADV728x is working within the boundaries of the standards, any black region is acceptable and must be compensated within the SoC.

Customer has responded below:    
    we will crop the extra black lines from the ADV output. We have no further queries.

Thanks,
Ebin

Hi ,
We have suggested the following response to the customer:
   The SoC can Crop the extra black lines on the vertical dimension and Horizontal dimension. We suggested they can simply start processing at line 23 and stop 5 lines before frame end on the vertical dimensions and crop the extra black lines crop 720 to 704 on the Horizontal dimension .ADV728x is working within the boundaries of the standards, any black region is acceptable and must be compensated within the SoC.

Customer has responded below:    
    we will crop the extra black lines from the ADV output. We have no further queries.

Thanks,
Ebin