Hello,
internal parameters. Contact ADI for further details, if required."
ADV7181C
Production
The ADV7181C is a high quality, single-chip, multiformat video decoder and graphics digitizer. This multiformat decoder supports the conversion of PAL...
Datasheet
ADV7181C on Analog.com
Hello,
Hi,
I saw in the manual (Rev C) page 192 "Internal parameters, e.g. the threshold for entering free-run mode, can be overwritten by
internal parameters. Contact ADI for further details, if required."
Also, please check the register mentioned below in order to switch into and out of free-run mode. This threshold register is described on page 193 of the document at ADV7181C_Manual_RevC.pdf

Thanks,
Poornima
Thanks for your quick answer. I saw in register 0xB3 there are also reserved bits.
Hi,
Please bypass the CP for disabling the freerun.

Thanks,
Poornima
Hi,
To be sure to undersand your answer, I need to set (value 1) the bit [0] in register 0xC9. Can you confirme?
Regards
Bruno
Hi,
Yes, Please check and let us know whether CP module get bypassed.
Thanks,
Poornima
Hi Poornima, sorry for the delay but I had an issue on my board.
I need to order an evaluation board to continue my investigations.
I will send you news when I will receive it.
Regards
Hi Poornima, I am working now on the Evaluation board from ADI (EVAL-ADV7181CLQEBZ) to solve my issue. I tested your answer : to set bit 0 in register 0xC9 but I have the same issue.
Do do have an other idea?
Regards
Hi,
Apologies for the delayed response.
Please use below register for disabling the free run and let us know the result.

Thanks,
Poornima
HI,
We have the same issue.
But we use the Component Processor, not the Standard Processor.
Hi,
Please evaluate the same in our eval board by configuring the above suggested freerun registers and let us know about it.
Thanks,
Poornima
Hi, I am working on your evaluation board (see my reply the Feb 12).
Hi,
We will crosscheck the same here in our eval board and let you know the update.
Thanks,
Poornima
Hi,
We will crosscheck the same here in our eval board and let you know the update.
Thanks,
Poornima
Hi,
Please let us know, As you mentioned, the input is coming from the camera. In that case, how is the component processor involved?
Kindly note that Standard definition processor (SDP), which processes all PAL, NTSC, and SECAM signal types.The component processor (CP), which processes YPrPb and RGB component formats, including RGB graphics.
Thanks,
Poornima
Hi,
We evaluated this on our EVAL ADV7282A board, but we did not observe this issue. We could see only the video transition while switching between two inputs.
Kindly note that, blue video output occurs only when a stable clock is not detected or when the HDMI cable is disconnected so please crosscheck your configuration once.
Thanks,
Poornima
Hi,
We use RGB cameras with synchro on Green. We observed the issue and we recorded the Green signal with a proprietary data acquisition system in order to play back the video and reproduce the issue on our equipment and on the evaluation board.
I don't know how to send you my recorded video. Have you a idea?
See the configuration used in the evaluation board.

Hi,
Please let me know, Are you facing the same issue even without SoG input?
Thanks,
Poornima
Hi,
During my tests in SDP mode, I encountered no problems (no free run). The free run appear only in CP configuration.
Hi,
Please let us know if you are using the below register configuration for SOG input.
Also, please try once without using the SOG input.
##CP 720p##
:720p/60Hz YPrPb In 16Bit 422 EAV/SAV Out Encoder:
42 05 01 ; Prim_Mode =001b COMP
42 06 0A ; VID_STD=1010b for 720P 1x1
42 1D 47 ; Enable 28MHz Crystal
42 3A 21 ; set latch clock settings to 010b, Power Down ADC3
42 3B 81 ; Enable Internal Bias
42 3C 5D ; PLL_QPUMP to 101b
42 6B C3 ; Select 422 16 bit YPrPb out from CP
42 85 19 ; Turn off SSPD and force SOY. For Eval Board.
42 86 1B ; Enable stdi_line_count_mode
42 BF 06 ; Blue Screen Free Run Colour
42 C0 40 ; default color
42 C1 F0 ; default color
42 C2 80 ; Default color
42 0E 80 ; Enable Hidden Space.
42 52 46 ; Enable SOG/SOY Clamp Filter
42 54 00 ; CML Level Change
42 F6 3B ; ADI Recommended Setting
42 0E 00 ; Disable Hidden Space.
56 17 02 ; Software Reset
56 00 1C ; Power up DACs and PLL
56 01 10 ; ED/HD-SDR Only mode
56 30 2C ; 720p@60 Frame rate, EAV/SAV codes enabled
56 31 01 ; HD4X enabled, Pixel data valid
56 33 68 ; PrPb SSAF, SINC filter enabled, 8 bit input mode enabled
End
Thanks,
Poornima
Hi,
I'm not getting any image on my monitor with these settings.
I don't understand what you mean by "try once without using the SOG input"?
Regards
Bruno
Hi,
Please do not enable Sync on Green at the input side and disable the corresponding register.
Thanks,
Poornima
HI Poormina,
Please, can you help me to give me the register numbrer to disable SoG?
Regards
Bruno
Hi,
Please use the register below to disable the SOG.
42 52 46 ; Enable SOG/SOY Clamp Filter
Thanks,
Poornima