Hello,
internal parameters. Contact ADI for further details, if required."
ADV7181C
Production
The ADV7181C is a high quality, single-chip, multiformat video decoder and graphics digitizer. This multiformat decoder supports the conversion of PAL...
Datasheet
ADV7181C on Analog.com
Hello,
Hi,
I saw in the manual (Rev C) page 192 "Internal parameters, e.g. the threshold for entering free-run mode, can be overwritten by
internal parameters. Contact ADI for further details, if required."
Also, please check the register mentioned below in order to switch into and out of free-run mode. This threshold register is described on page 193 of the document at ADV7181C_Manual_RevC.pdf

Thanks,
Poornima
Thanks for your quick answer. I saw in register 0xB3 there are also reserved bits.
Hi,
The default threshold value is set in register 0xB3. The threshold can be enabled or adjusted as required by using 'CP_F_RUN_TH' register.
Thanks,
Poornima
Hi, I tried several values as default value b100 and max value b001. But I have the same issue. I didn't see how to disabled it. Is it in "reserved bits"?
Bruno
Hi,
Could you please try by disabling the freerun by configuring the 'Disable SDP freerun mode and Bypassing the CP'.

Thanks,
Poornima
Hi,
I am working with CP not SDP. Is it possible to disable freerun in CP?
Bruno
Hi,
Please bypass the CP for disabling the freerun.

Thanks,
Poornima
Hi,
To be sure to undersand your answer, I need to set (value 1) the bit [0] in register 0xC9. Can you confirme?
Regards
Bruno
Hi,
Yes, Please check and let us know whether CP module get bypassed.
Thanks,
Poornima