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640x480 30Hz Configuration

Thread Summary

The user is troubleshooting a 640x480 30Hz camera sensor with the ADV7513 HDMI transmitter, where no image appears on the monitor. The final answer suggests configuring pixel repetition in register 0x3B and 0x3C to increase the pixel clock to meet the HDMI minimum of 20 MHz. The user should set 0x3C to 0x08 for 2x clock and 4:3 aspect ratio, and ensure the AVI info frame is correctly configured to handle the pixel repetition.
AI Generated Content
Category: Datasheet/Specs
Product Number: ADV7513

Hi,

Our camera sensor is 640x480 30Hz only. Below is my configuration so far, but no image on monitor. I think I need to configure pixel repetition in register 0x3B; I've tried a few different setting, but no luck. With the code in it's current state the 'main loop' section also shows pll locked and hpd detected.

void AppEntry( void )

{

uint32_t nCount = 0;

uint8_t nReg;

uint8_t nMode;

uint8_t nReg1, nReg2, nReg3;

//

// Power LED ON, status LED OFF

//

HAL_GPIO_WritePin( GPIOA, LED_PWR_Pin, GPIO_PIN_RESET );

HAL_GPIO_WritePin( GPIOA, LED_STATE_Pin, GPIO_PIN_SET );

//

// Check device is ready and we can talk to it

//

while( true )

{

HAL_StatusTypeDef hal_result;

hal_result = HAL_I2C_IsDeviceReady(

&hi2c1,

( uint16_t ) ( sg_nI2CAdds << 1 ) | 0x01,

3u,

200u

);

if ( hal_result == HAL_OK )

{

break;

}

HAL_Delay( 500 );

// Hard error after 5s.

nCount++;

if ( nCount == 10 )

{

Error_Halt( );

}

}

// === Power / reset ===

WriteReg(0x41, 0x10); // Power up

WriteReg(0x98, 0x03); // Required settings per ADI guide

WriteReg(0x9A, 0xE0);

WriteReg(0x9C, 0x30);

WriteReg(0x9D, 0x61); // Pixel clock divide = /1 (0x61 = ÷1, 27 MHz in)

WriteReg(0xA2, 0xA4);

WriteReg(0xA3, 0xA4);

WriteReg(0xE0, 0xD0);

WriteReg(0xF9, 0x00);

// === Input format ===

WriteReg(0x15, 0x04); // YCbCr 4:2:2, embedded sync

WriteReg(0x16, 0xB8); // 8-bit, style 1 (BT.656), input edge = rising

WriteReg(0x17, 0x02); // 4:3 aspect, DE generator enabled

WriteReg(0x48, 0x00); // Justification evenly distributed

WriteReg(0xD0, 0x00); // Sync pulse mode = case 2 (embedded)

// === Output format ===

WriteReg(0xAF, 0x04); // HDMI mode, no encryption

WriteReg(0x18, 0x06); // CSC disabled (bypass)

// === PLL reset sequence ===

//WriteReg(0x3B, 0x00); // Manual mode, PR = 1x

// === TMDS output ===

WriteReg(0xD6, 0xC0); // TMDS enabled, soft turn-on

//

// Main Loop

//

while( true )

{

//

// Status check

//

nReg1 = ReadReg( 0x41 );

nReg2 = ReadReg( 0x42 );

nReg3 = ReadReg( 0x9E );

if (( nReg1 & 0x10 ) && // Power EN

(( nReg2 & 0xF0 ) == 0xF0 ) && // HDMI status

( nReg3 & 0x10 )) // PLL Lock

{

// LED on

HAL_GPIO_WritePin( GPIOA, LED_STATE_Pin, GPIO_PIN_RESET );

}

else

{

// LED off

HAL_GPIO_WritePin( GPIOA, LED_STATE_Pin, GPIO_PIN_SET );

}

//

// Debug (use breakpoint)

//

// Detected input formats

nReg = ReadReg( 0x3E );

nReg = ReadReg( 0x3F );

nReg = ReadReg( 0x3B );

nReg = ReadReg( 0x3C );

}

}

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