ADV7613: Intermittent Corrupt Colours caused by PLL Gear

Hello,

We are experiencing an intermittent colour issue when a source is connected and happens when the ADV7613 is receiving 1920x1080 60Hz or 1280x720 60Hz. An image is below of the corrupt colours compared to the original video.

In our driver we have set the following recommended register settings based on the guide ez.analog.com/.../ADV7613_5F00_Recommended_5F00_Settings_5F00_Guide.pdf

{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x00), 0x02 },
{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x01), 0x06 },
{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x02), 0xF2 },
{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x03), 0x42 },
{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x04), 0x63 },
{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x05), 0x20 },
{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x0C), 0x42 },
{ ADV76XX_REG(ADV76XX_PAGE_IO, 0x15), 0xAE },
{ ADV76XX_REG(ADV76XX_PAGE_CP, 0x8B), 0x40 },
{ ADV76XX_REG(ADV76XX_PAGE_CP, 0x8C), 0x02 },
{ ADV76XX_REG(ADV76XX_PAGE_CP, 0x8D), 0x02 },
{ ADV76XX_REG(ADV76XX_PAGE_CP, 0x6C), 0x00 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x03), 0x98 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x10), 0xA5 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x1B), 0x08 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x45), 0x04 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x97), 0xC0 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3D), 0x10 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3E), 0x7B },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x3F), 0x5E },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4E), 0xFE },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x4F), 0x08 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x57), 0xA3 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x58), 0x07 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x5A), 0x00 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x6F), 0x08 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x83), 0xFE },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x85), 0x10 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x86), 0x9B },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x89), 0x01 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x93), 0x00 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9B), 0x03 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9C), 0x80 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9C), 0xC0 },
{ ADV76XX_REG(ADV76XX_PAGE_HDMI, 0x9C), 0x00 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x40), 0x08 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x43), 0x03 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x44), 0x00 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x45), 0x04 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x46), 0x53 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x47), 0x03 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x4C), 0x71 },
{ ADV76XX_REG(ADV7613_PAGE_LVDS, 0x4E), 0x04 },

The LVDS Transmitter has been configured in the order of the UG-907 manual https://www.analog.com/media/en/technical-documentation/user-guides/adv7613-ug-907.pdf

The decision for the PLL Gear setting in our driver is based on the following rules from the UG-907 manual:

PLL GEAR SELECTION Page 161
The ADV7613 can output graphics resolutions with clock frequency 25MHz to 92 MHz.
For this range of graphics resolutions and frequencies mentioned, the PLL gear must be set as follows:
• From 25 MHz to 40 MHz: TX_PLL_GEAR[2:0] must be set to 000.
• From 40 MHz to 92 MHz: TX_PLL_GEAR[2:0] must be set to 010.

An example of how we calculate the LVDS Clock for 1920x1080 60Hz and 1280x720 60Hz is shown below:

8 lane interface
1920x1080p60 SMPTE 148.50MHz pixel clock; /2 = 74.250HMz LVDS clock; x7 = 519.750Mb/s data rate
1280x720p60 CVT 74.25MHz pixel clock; /2 = 37.125HMz LVDS clock; x7 = 259.875Mb/s data rate

In our hardware platform 57.143MHz is the slowest pixel clock before switching to 4 lane mode, otherwise we use 8 lane mode.

It has been noticed in our testing that sometimes toggling the PLL Gear setting resolves the colour issue.

Some help would be welcome to ensure our configuration is correct, or if this issue is already known.

Thank you

Jonathan