Hi ADI Expert,
We have tested the ADV7280A-M for MIPI D-PHY V2.1 compliance test, but test report failed 2 items.
One is 1.3.12 HS Data TX 80%- 20% fall time and others is 1.5.3 HS clock Rising Edge Alignment to First Payload Bit.
Then I checked the reference manual, MIPI CSI Map register Address 0x01 to 0x05 as TLPX/THSPREP/THSZEROS/THSTRAIL/THSEXIT registers.
It seems that adjust the MIPI timing, but not clear information. Can you give me some advice on this matter? Thanks.