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ADV728A-M MIPI compliance test fail by first payload bit and fall time items

Category: Hardware
Product Number: ADV7280A

Hi ADI Expert,

We have tested the ADV7280A-M for MIPI D-PHY V2.1 compliance test, but test report failed 2 items.

One is 1.3.12 HS Data TX 80%- 20% fall time and others is 1.5.3 HS clock Rising Edge Alignment to First Payload Bit.

 

 

Then I checked the reference manual, MIPI CSI Map register Address 0x01 to 0x05 as TLPX/THSPREP/THSZEROS/THSTRAIL/THSEXIT registers.

It seems that adjust the MIPI timing, but not clear information.  Can you give me some advice on this matter? Thanks.

  • Hi,

    Kindly note that, ADV728A-M MIPI CSI-2 transmitter conforms to the "MIPI D-PHY Version 1.00.00 specification". It therefore conforms to the timing specifications in the MIPI D-PHY Version 1.00.00 specification.

     To guarantee optimal operation, the MIPI CSI-2 receiver should also conform to the 'MIPI D-PHY Version 1.00.00 specification'.

    As per MIPI specification the MIPI receiver need to terminate the signals correctly. If the Micro processor/ FPGA does not control the termination correctly then the MIPI signals from the ADV7280-M cannot be decoded.

    For our evaluation of the ADV7280-M we used the MIPI reference termination board available from here:
    www.iol.unh.edu/.../mipi

    Thanks,

    Poornima