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"NEW_MUTE_COMPRS" and "DIS_I2S_ZERO_COMPR" register bits of ADV7480.

Category: Hardware
Product Number: ADV7480

Hello,

I have two question about "NEW_MUTE_COMPRS" and "DIS_I2S_ZERO_COMPR" register bits of ADV7480.

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Question 1:
The following Ez thread is for the ADV7842.
https://ez.analog.com/video/f/q-a/11205/adv7842-i2s-output-with-compressed-audio-input/39681

Are the same register's bits below available at the same addresses for the ADV7480?

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https://ez.analog.com/video/f/q-a/11205/adv7842-i2s-output-with-compressed-audio-input/39681

NEW_MUTE_COMPRS (HDMI, 0x1A [7])
Configures the audio mute function
• 0 = The part mutes the audio data it outputs in I2S format if it receives compressed audio and the mute mask MT_MSK_COMPRS_AUD is set high.
The mute circuit mutes the audio data by ramping down the outgoing audio data.
• 1 [Default] = See the description of DIS_I2S_ZERO_COMPR.

DIS_I2S_ZERO_COMPR (HDMI 0x3 [7])
Enable/Disable zero’ing of I2S data. This control is effective when NEW_MUTE_COMPRS is set high.
• 0[Default] = The reception of compressed audio does not cause the part to mute the I2S output (i.e. MT_MSK_COMPRS_AUD has no effect) but rather to zero audio data output via the I2S outputs.
If any other mute condition causes a mute while compressed audio is received (e.g. loss of TMDS clock) all output are not ramped down but rather zero’ed sharply.
• 1 = The reception of compressed audio does not cause the part to mute the I2S output (i.e. MT_MSK_COMPRS_AUD has no effect) nor to zero audio data output via the I2S outputs.
If any other mute condition causes a mute while compressed audio is received (e.g. loss of TMDS clock) all output are not ramped down but rather zero’ed sharply
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Are the same register's bits above available at the same addresses for the ADV7480?

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Question 2:
The ADV7480 manuals do not show the details of the above registers, but those does show the default register values ​​for the same address bits.
The default values ​​of register bit "HDMI map, 0x1A [7]" and "HDMI map 0x03 [7]" are as follows:
HDMI map, 0x1A [7] = default : 1
HDMI map, 0x03 [7] = default : 0

If the same register's bits are available at the same addresses for the ADV7480,
I think that when the above register bits are be kept the default values for ADV7480, the audio output data of the ADV7480 will be zero when compressed audio is input.
Is my understanding correct?

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Thank you!
Best regards.
Tamu