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Question about ADV8005: Interpolation method for V timing synchronization and generation method for output signal synchronization

Category: Datasheet/Specs
Product Number: ADV8005

Hello everyone,

 

I am currently using ADV8005 and working on improving the timing for inputting and outputting signals.

I have noticed that ADV8005 has a frame frequency conversion function.

Specifically, I am interested in understanding the interpolation method used to synchronize the V timing with the input V frequency when converting the frame rate from 50Hz to 60Hz.

Could you please provide insights into how this interpolation method is achieved?

 

Additionally, I would like to know more about the generation method for applying output signal synchronization to the timing of applying input synchronization.

How is this synchronization of output signal timing with input synchronization timing accomplished?

 

Any information or insights on these topics would be greatly appreciated. Thank you in advance for your help!

  • Hi,

      Could you please provide insights into how this interpolation method is achieved?

        This is "ADI proprietary algorithm" So we don't have any in-depth details other than what available in the ADV8005 manuals.

        Also Please refer section 3.2.2.3.Scaler Interpolation Mode(Page 116) at ADV8005 Hardware Reference Manual (Rev. A) (analog.com)
    Thanks,
    Poornima
  • Hi,

    Please find the high level details about interpolation and synchronization method,

    Interpolation method for V timing synchronization:

    ADV8005 uses interpolation techniques to adjust the timing and quality of video signals, ensuring proper alignment of vertical timing and smooth conversion between resolutions and frame rates and it uses interpolation to synchronize the vertical (V) timing of the input signal with the desired output frame rate. When converting frame rates (e.g., from 50Hz to 60Hz), the device interpolates the input signal to generate intermediate frames that match the output frame rate. This process involves:

      a) Frame rate conversation - It calculate the necessary intermediate frames to match the output frame rate for example converting from 50Hz to 60Hz requires additional frame to fill the gap.

      b) Temporal Interpolation - This technique is generates new frames from original frames as needed to generate the desired frame rate .

    Conversation of 50Hz to 60Hz operation using temporal interpolation is illustared in below figure and for every five fields of 50 Hz video, there are six fields of 60 Hz video ,

    After both sources are aligned, two adjacent 50 Hz fields are mixed together to generate a new 60 Hz field. This technique is used in some inexpensive standards converters to convert between 50 Hz and 60 Hz standards. Note that no motion analysis is done. Therefore, if the camera operating at 50 Hz pans horizontally past a narrow vertical object, you see one object once every six 60 Hz fields, and for the five fields in between, you see two objects, one fading in while the other fades out.

    Please refer below attached video demy pdf and here you can find detailed of interpolation technique.

    PDF

    2. Generation Method for Output Signal Synchronization:

        ADV8005 synchronizes output signals with a reference clock using PLLs and generates appropriate sync pulses to ensure the output video signal is accurately timed according to the specified standards.

    **Reference Clock**: The ADV8005 receives a reference clock to ensure its internal timing and processing are aligned with external requirements. This clock signal is crucial for maintaining synchronization across different video signals.

    Phase-Locked Loop (PLL)**: The ADV8005 uses PLLs to lock its internal clocks to the reference signal, ensuring accurate timing and synchronization of output signals.

    Sync Pulse Generation**: The ADV8005 generates synchronization pulses (like horizontal and vertical sync signals) based on the reference timing. This ensures that the output video signal is in sync with the expected timing standards (e.g., HDMI, SDI).

    1. Phase-Locked Loop (PLL) Mechanism:
      • Purpose: The PLL is used to synchronize the output signal’s phase with the input signal.
      • Function: It locks onto the frequency of the input signal and generates a clock signal that is phase-aligned with the input. This ensures that the output signal maintains the same timing characteristics as the input.
    2. Frame Buffering:
      • Function: Frame buffering helps manage differences in timing between the input and output signals. It stores input frames temporarily, allowing the device to read and output frames at the correct rate.
      • Process: The input frames are written into a buffer at the input rate and read out at the output rate. This helps in absorbing any jitter or variations in the input signal timing.

    Thanks,

    Poornima