ADV7280A-M Mipi Clock issues

Question

Hi, 
 
 I am working with the ADV7280A-M Evaluation Board with an imx8mp, I used the ADV7280AM_Cust-VER.5.0.txt script to setup the CVBS FAST Switch I2P configuration using 480p output and an analog video source providing NTSC video. 
 Currently I'm having issues to dequeue buffers, as it seems that there is no MIPI CLK signal. 
 Researching we checked that the MIPI CLK frequency should be 108MHz, Is this correct? What is the expected MIPI frequency? 
 
 We measure the CLKP signal from the ADV7280 and we have a CC Voltage of approximate 200mV (the scope has 200MHz bandwidth), additionally we have disconnected the MIPI capture device in case it was affecting the MIPI signals from the EVAL-ADV7280M, but the CLK signals remains at 200mV:

We measure the D0P signal and the output is the following (seems active):

We also tested the ADV7280A-M with the ADV7280-M_DVP_Eval_Program, we tested different configurations like the Free Run Mode, Fast Switch and Fast Switch I2P. We measure the CLKP and D0P signals and we obtained the same for all configurations. 
 CLKP signal: 
 
 D0P signal:

Question: Could you please advice regarding the CLKP signal? It seems to be non-active and the processor is not detecting changes in the CLKP/N signal. 
 Question: When the MIPI clock is active and working: Is it possible to modify the MIPI clock frequency? Could you please indicate which registers can be used to vary the MIPI clock frequency?

DharaniS · Accepted Answer

Hi, 
 Could you please double check that the ADV7280-M is programmed correctly with ADI recommended I2C writes. You can get an ADV7280-M evaluation board to double check this. 
 If the backend processor is not configured correctly and it is pulling the clock lane low. Could you please double check that the backend processor is configured correctly with the latest software? 
 As part of the MIPI specification the MIPI receiver needs to terminate the signals correctly. The termination required changes depending on the MIPI mode (e.g. high speed, low power mode etc). The receiver needs to detect the mode of operation and dynamically set its termination accordingly. 
 Note that the Clock signals will only appear correctly when properly terminated. You could use a University of New Hampshire MIPI reference termination board in order to show this in the laboratory. 
 This is described in applications note AN-1337 http://www.analog.com/media/en/technical-documentation/application-notes/AN-1337.pdf 
 Unfortunately, you cannot slow down the MIPI data rates. The data rates are fixed depending on your mode of operation. 
 In interlaced mode the ADV7282-M outputs with a 216 Mbps data rate (MIPI clock frequency 108 MHz). 
 In progressive mode (i.e. I2P mode on) the ADV7282-M outputs a 432 Mbps data rate (MIPI clock frequency 216 MHz). 
 
 Thanks, Dharani S)

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