Hi, I'm working with the ADV8005KBCZ-8B in my design, and I've designed the PCB traces for the external DDR2 memories based on the evaluation board.
I'll now begin evaluating my design, but I'm considering the possibility of routing DDR2 signals on the inner layers if it doesn't meet EMI certification requirements.
Do you think this would be feasible?
If possible, can the series termination registers were removed?
I'm planning to conduct SI simulations before finalizing the PCB traces.