ADV7610: Power up sequence between 1.8V supplies (CVDD, PVDD and DVDD)

Hi GuenterL,

Please let me check, just in case. If the three power supplies of 1.8V are ramped up at different timings with individual power ICs, that is also fine, right?

Best regards,

I really don't know about ramping up 1.8V at different rates, probably OK but it's never been checked.  On a side note why would you power the three 1.8V rails from 3 separate power sources.  It make more sense to me to use one power source and just make sure the voltage on the pins are isolated and clean.  The ferrite beads and capacitors keep it clean and isolated.

Hi GuenterL,

Thank you for the answer. This question is related to the following post. I'm sorry, it might have been better to ask as an additional question in the post.

https://ez.analog.com/video/f/q-a/573681/relationship-between-jitter-and-power-supply-of-adv7610

There is a sentence below that I would like to check.

"So it is highly desirable to provide separate regulated or heavily filtered supplies for each of these circuitry groups (CVDD and PVDD)."

Is it common and recommended that the three 1.8V supplies come from a single power IC (with filters) rather than from three separate power ICs?

Best regards,

For our reference boards normally 1.8V comes from a LDO which has very clean output to begin with and each of the three chip power domains are isolated by a LC Pi filter.  This is how we spec the part.

The key is to keep PVDD as clean as possible and I like to use a solid ground plane running under the device.  Good layout is always key.  If you need I can review he layout.

Hi GuenterL,

I got it. Thank you for your help.

Best regards,