DDR2 memory selection for ADV8003 and ADV8005

PoornimaSubramani to comment

Hi Takanori Umestu San,

       Please check our reference designs that how we are interfacing the "DDR: MT47H128M16 (in ARM) or MT47H64M16 (in BF)" with ADV8003 part by referring our schematics and Pin compatibility 5810.EVAL-ADV8003-SMZ_rev0p2_schems_20150116.pdf & ADV8005 Hardware Reference Manual (Rev. A) (analog.com) at (+) Advantiv EVAL-ADV8003-SMZ-P Video Evaluation Board - Documents - Video - EngineerZone (analog.com)

      This need to be check with pin-to-pin compatibility between ADV8003 & "ETRON or NANYA" external memory chip.

      Then by doing DDR loopback test, We came to know whether we can able to control external memory by using ADV8003 chip.

      And the following are possible failures that could cause the DDR2 loopback test to fail:

• Address or control or clock open or short: all bit lines failing

• Single DQ open or short to ground or supply: single bit line failing on both positive and negative edges

• Short between DQ lines: two bit lines failing, routing in adjacent resistors of resistor pack

• DQS or DM open or short: eight DQ lines failing • Timing transfer problem: one or more bit lines failing.

Also let me check with expert about the ADV8003-EVK availability.

Thanks,

Poornima

Hi Takanori Umestu San,

       Please check our reference designs that how we are interfacing the "DDR: MT47H128M16 (in ARM) or MT47H64M16 (in BF)" with ADV8003 part by referring our schematics and Pin compatibility 5810.EVAL-ADV8003-SMZ_rev0p2_schems_20150116.pdf & ADV8005 Hardware Reference Manual (Rev. A) (analog.com) at (+) Advantiv EVAL-ADV8003-SMZ-P Video Evaluation Board - Documents - Video - EngineerZone (analog.com)

      This need to be check with pin-to-pin compatibility between ADV8003 & "ETRON or NANYA" external memory chip.

      Then by doing DDR loopback test, We came to know whether we can able to control external memory by using ADV8003 chip.

      And the following are possible failures that could cause the DDR2 loopback test to fail:

• Address or control or clock open or short: all bit lines failing

• Single DQ open or short to ground or supply: single bit line failing on both positive and negative edges

• Short between DQ lines: two bit lines failing, routing in adjacent resistors of resistor pack

• DQS or DM open or short: eight DQ lines failing • Timing transfer problem: one or more bit lines failing.

Also let me check with expert about the ADV8003-EVK availability.

Thanks,

Poornima