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[ADV7480] About the value of stdi_dvalid_ch1

Category: Datasheet/Specs

Hi

Customer wants to confirm the value of stdi_dvalid_ch1 as a condition in the flow to check the video input resolution.
They are considering a flow that sets the Slave Address to 0x44 (CP-MAP) and checks if the value of Register Address = 0xB1 bit[7] (stdi_dvalid_ch1) is 1.

We have two questions about stdi_dvalid_ch1.
Q1. Stdi_dvalid_ch1 will contain the result of what was confirmed?
Q2. What is the state of the input signal when Stdi_dvalid_ch1=0?

There is no description about stdi_dvalid_ch1 in the data sheet.
Could you please reply as soon as possible?

Best Regards.

  • Hi,

    Please find the below comments,

    Q1. Stdi_dvalid_ch1 will contain the result of what was confirmed ?

                Generally, STDI registers is used to measure the input format timing & in addition to the STDI HDMI Synchronization parameters read back registers can be used.

    Q2. What is the state of the input signal when Stdi_dvalid_ch1=0 ?

                Yes, these register(stdi_dvalid_ch1) details are not available in the "ADV748x manuals" but you can use this register(CH1_STDI_DVALID, CP Map, Address 0xB1[7] (Read Only)) Since it is mentioned in the UG-214: ADV7842 Hardware User Guide

    Note:  

       It is recommended to check that the following read back registers are all set to 1 before reading the horizontal and vertical measurements in the HDMI/MHL Receiver:

    • de_regen_lck_raw, IO Map, Address 0x71[0]

    • v_locked_raw, IO Map, Address 0x71[1]

    • tmdspll_lck_a_raw, IO Map, Address 0x71[7]

    • stdi_dvalid_ch1, CP Map, Address 0xB1[7]

    The horizontal and vertical measurements are valid and stable once these four read back registers are all stable and set to 1.

    Thanks,

    Poornima

  • Hi,

    Thank you for your reply.

    I understand.

    Best Regards.