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CSC Function on ADV7610

Category: Datasheet/Specs
Product Number: ADV7610

Hello,

I've received questions for CEC of ADV7610. Could you check following query?

Item 1 : Regarding CSC from YPbPr IN to YPbPr OUT

They're using following register settings. If they'd like to make the configuration of "YPbPr IN to YPbPr OUT", can it be achieved by simply changing "address 0x02 -> 0xF2" to "address 0x02 -> 0xF0"?

If it needs any other settings, please let me know.

Item 2 : Regarding 24bit SDR422 mode

Their current setting is 24bit SDR 422 mode. With the current settings for "YPbPr in + YPbPr out", is the 12 pin for Y output/PbPr output 0 padding for the lower 4 bits?

If this is used as "RGB in + YPbPr out" and internal CSC is used, will the internal calculation result come out in 12bit full? Or is the lower 4 bits 0 padding (if 0 padding, I would like to know whether it is rounded or truncated)?

Best Regards,

S.O.

Parents
  • Hi,

      Please find the below comments,

    1. Kindly let us know, Are you converting from RGB color space to YPbPr OUT then the register setting from "address 0x02 -> 0xF2" to "address 0x02 -> 0xF0" rare correct and also crosscheck your configuration with reference one some of the recommended settings are missing.

    2. Regarding 24bit SDR422 mode, Please refer Pixel pin assignment and there we can find the details of how the pixel port pins are assigned for YPbPr output of 24bit SDR422 Mode and also we came to know the pins that need to be not connected.

     

    Thanks,

    Poornima

  • Adding my comments for the details of Item 2. Could you clarify following each question?

    [ Case of "YPbPr input YPbPr output" ]

    As for the red letter part in below image, lower 4 bit may be 0 padding on both Y PbPr, Is it correct?

    [ Case of "RGB input YPbPr output" ]

    As for the red letter part in below image, In the CSC calculation is the bit accuracy inside far more than12bit? And is output bit width is it rounded or truncated to 8bit according to the input 8bit? or fully 12bit output for keeping calculation bit accuracy?

    Please also keep comment for Item1

  • Hi,

      Please let us know, why we need to go for lower 4 bit zero Padding/Truncating Since ADV7610 have an option to support 24 bit output mode ?

       If we have the respective output bit support, then why should we Rounding / Truncating the output bits.

    Thanks,

    Poornima

Reply Children
  • Hi,

    This is a question of CSC calculation accuracy, not for pin assignment. As I mentioned above, they're using 24bit SDR 422 mode for the pin assign. Since the format is 422, they're asking for the CSC calculation spec when it working in each case such as Rounding / Truncating with the outputs of lower bits. It's needed for defining the customer product specification.

    Please let us know the answer for Item1 and 2.

  • Hi,

     We don't have any CSC calculation spec other than what provided in the manuals so we need to check with expert about how Rounding / Truncating can affect the CSC calculation.

     CSC calculation been little elaborately provided in ADV7401 Manual. Please refer section 6.5.1 of the ADV7403 Datasheet Manual (ADV7403_Manual_RevB.pdf) that provides more details about CSC coefficient calculation, which is available at ADV7403 Design Support Files.

     Also Please refer this thread understanding ADV7513 CSC behavior - Q&A - Video - EngineerZone (analog.com)

    Thanks,

    Poornima

  • Hi,

    I understand the comments for item2. How about the question of Item1? Do you have any comments whether it's enough with the uploaded list?

    Item 1 : following settings are all of the registers they use currently. As you commented "some of the recommended settings are missing", does it still have any missing? Please add the registers in below list if there're any required register.

  • Hi,

     Regarding Item 1,  We have script for YPrPb input to YPrPb output So Please follow our exact script register configuration.

     Difference from reference one been highlighted in yellow color.

    Please note that, If those ADI Recommended writes are not included, the part would not work reliably (unless those values are default anyway).Those registers are generally internal settings that let us handle process variation which is why they are determined during characterization. The settings that show up as "ADI Recommended Settings" are the values that work reliably across voltage and temperature.

    Thanks,

    Poornima

  • Sorry for jumping in, I also have similar questions on ADV7610, and I have several following questions.

    Item3 

    There are 2 points for CSC function, CP and Backend ColorSpace.


    There are many settings for CP part CSC, but I can't find setting for Backend ColorSpace Conversion part.
    Is there a setting for Backend ColorSpace Conversion part?

    And also I'd like to know detail function on Backend ColorSpace.
    What is the purpose of this Backend ColorSpace conversion and why it is located here?

    Item4 (similar to Item1)

    As for the "ADI recommended" setting,

    I found the same setting on ADV7611, and there are comment of
    "for non-fast switching application".

    What is this "non-fast switching" ? A frequent format change?
    I can't link this "for non-fast switching application" to what your mentioned
    "the values that work reliably across voltage and temperature". Is the situation of ADV7610 different from that of ADV7611?

    And also I'd like to know the "risk" that these "ADI recommended settings" are not set.
    What is the risk to be considered?

    Item5

    As for the IO address 0x02h, the setting of 0xF5h means the Auto CSC and YPbPr out as the output of CP block.
    This "Auto CSC" means that checking the input AVI info and by the combination of input color space detected by the AVI info
    and RGB_OUT setting, color space conversion is determined, is it correct?

    If so by this 0x98h, 0x02h 0xF5h setting both HDMI YPbPr input and RGB input can be converted YPbPr output as ADV7610 colorspace output automatically, am I right?

    Item6

    I use the setting of IO map address 0xBF and set 0x01, it means bypass CP core.

    If this setting is done and if the "24bit SDR ITU-656 422 Mode2 " is chosen as the output assignment

    and if HDMI input is RGB, what would happen?

  • Hi Katsuya San,

            Please find the below comments,

    What is the purpose of this Backend ColoSpace conversion and why it is located here?

        "Back End CSC" is nothing, but the CSC in the CP and it is not an extra one.

         The use of the CP CSC prevents timing mismatches between the luma and the chroma channels that can occur when the DPP CSC is used.
         Also, ADV7610 automatically configures the DPP CSC depending on the input and output formats and the use of the color control feature and note that DPP CSC is always in pass-through mode unless the ADV7610 is processing an RGB input, outputting this input in the RGB color space and VID_ADJ_EN is enabled. 
    ADI Recommended Setting:
         These are register values which are determined during characterization and values are given that you must write. They sometimes change from recommended settings version to version. They are not documented, you simply need to write the value as per recommended setting / Script.

    Please note that, If those writes are not included, Part would not expect to work reliably .

    Those registers are generally internal settings that let us handle process variation which is why they are determined during characterization. The settings that show up as "ADI Recommended Settings" are the values that work reliably across different voltage and temperature. They really should be called "ADI Required settings".
    Non-Fast Switching Mode:
       Fast switching is nothing but the part can lock to an video source more quickly in less than 1 second between two HDMI ports.
        This feature allows the user of a system containing the chip to seamlessly switch between HDCP encrypted sources. There is no delay in achieving video output which was previously caused by HDCP authentication. The time required to switch between HDMI sources with HDCP encryption is reduced to a fraction of a second.

    As for the IO address 0x02h, the setting of 0xF5h means the Auto CSC and YPbPr out as the output of CP block.
    This "Auto CSC" means that checking the input AVI info and by the combination of input color space detected by the AVI info
    and RGB_OUT setting, color space conversion is determined, is it correct?
       In automatic CSC mode, the user is required to program the input color space and the output color space for the correct operation of the
    CSC matrix.
          Manual CSC mode allows the user to program all the color space conversion by manually programming CSC coefficients.
    Note:
      ADV761x output is RGB, then you should use CP_MODE_GAIN_ADJ to increase brightness.
      ADV761x output is YCbCr/YPbPr, then you should use BRIGHTNESS_CNTRL to increase brightness.

    98 02 F5 ; Auto CSC, YCrCb Out, Set op_656 bit
    98 02 F7 ; Auto CSC, RGB Out, Set op_656 bit
    I use the setting of IO map address 0xBF and set 0x01, it means bypass CP core. ?
       
        Bypassing the CP means we can't do any color space conversion or other manipulation of the video data.
        Please note that, For full processing of the HDMI input, the CP core needs to be powered up.
        Also On this part, the STDI block is located within the CP core, bypassing the CP core is not a valid thing to do if you are using the STDI block.
    Thanks,
    Poornima
  • Sorry for my delayed reply.

    I actually checked Auto CSC function using ADV7610.

    Input is RGB 444 (limitedb range) 1920x1080 59.94p 75% color bar

    and expected output is YCbCr 422, BT709 color bar.

    The setting of address 0x02h of IO block is 0xFDh, and I found at the color change, for example, 

    cyan to green position, Cb/Cr data has slight overshoot and undershoot.

    And when the setting of 0xE0h of IO block is 0x80h (DS_WITHOUT_FILTER to be no filtering)

    this overshiit/undershoot disappears.

    But according to the downsampling theory, filtering is needed.

    Is it possible to know the chraracteristics of this downsampling filter?

    I'd like to know this overshoot/undershoot is inevitable or not.