ADDI7004

Hi,

For example, If input clock is at 72 MHz. When dual LVDS transmitter is enabled, the LVDS output clock to drive the identical panels will be running at half the input clock rate (36MHz).

HDMI Pixel repeated input for example: 0011223344......
LVDS transmitter 1: 01234
LVDS transmitter 2: 01234
Note: The LVDS transmitters in dual mode connected to a dual LVDS panel outputs even pixel data on LVDS Transmitter 1 and odd pixel data on LVDS Transmitter 2.

In single LVDS transmitter mode, there is no splitting of the even and odd pixel data.

There are many articles which describe this,
AN-1177 (Rev. 0) (analog.com)

Also note that, If input resolution 720p, when single LVDS transmitter mode is used, the input TMDS clock will be at 74.25MHz.But when dual LVDS transmitter enabled, in that case LVDS output clock  will be half the input clock rate (i.e 37MHz).

Thanks,

Poornima

Thank you reply.

let me know thtt addi7004 lvds out minimum input frequecny.

perhaps, low frequecny cli input not run in addi7004.

Hi,

   There is no much details been provided in ADDI7004 related manuals.

    Also Please refer this thread (+) ADDI7004 LVDS Pattern Generation. - Q&A - Video - EngineerZone (analog.com)

Thanks,

Poornima