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Why AD8123 Operate voltage change relate to output level?

Category: Datasheet/Specs
Product Number: AD8123

Hi Sir,

 In our system the VS+ will have some deviation it will from 4.9V~5.3V. 

We found the VS+ will cause the output level change , you can see below picture , is there any reason for this different? 

for VS+ = 5.3V , VS= 5V , The Vp-p equal to 5.16Vp-p

VS+ = 4.9V , VS- = -5V , The Vp-p equal to 4.86V.

 

  • Without seeing the full schematic and captured differential input traces it is hard to determine what might be causing this issue.

  • Hi Guenter,

    Thanks for take care this question.
    Please see the below circuit.
    We have try to fixed the Vpole , Vgain , Voffset , Vpeak by external power supply and also verify the input signal level is stable during the V+ changing.

    The input signal is come from AD8143 , AD8143 also use same VS+ , VS- with AD8123.
    But we see the video signal is very stable even the VS+ changing.

  • I have no immediate explanation.  The datasheet is only spec'd for Voffset=0V, not 2.5V.  I am curious if there is some undocumented secondary effect between Voffset and gain and VS+.

    Since you have an external supply connected to Voffset, is it possible to set Voffset =0V and see if the same gain issue exist?  Note D44-46 may need to be removed since they'd clip the output to a point you cannot measure the true gain as you did before.

    Also a general comment I am not sure why you are offsetting the output that much.  Most video decoders are AC coupled so any offset has no effect.

  • We understand the  Vpole , Vgain , Voffset , Vpeak will relate to output level , so we have tested it to set Voffset to 0 to make sure the Video offset level. 
    AD8123 is really old product for VGA signal extention , but some customer will design auto calibration and use sync-on color circuit , before the VGA output , the circuit need separate the H/Vsync , normally need rely to circuit like compactor, if the Video signal level and offset vibration that will get some effect with H/Vsync. 
    However , customer already modify thier H/Vsync recover circuit , but just not understand the reason for the level change during V+ change.  

    As datasheet mentioned , the voltage will relate to common mode voltage , so i guess it maybe reason to get output DC offset change during V+ change.
    But i can't find any idea for the signal level change. 

  • I also did not find any definitive reason to cause this in the datasheet.  This is a 15 year old device so finding the person who might actually know the reason is unlikely.  My initial "guess' is this information was not added to the datasheet when it was created.

    An auto calibration could be created to adjust Voffset or other adjustment methods implemented.

  • Hi Guenter,

     Thanks, i also review it again the section shall discussion input Vcm range. 

    BR

    Justin