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No HS/VS/PCLK/Data from ADV7619 after config the registers

Category: Software
Product Number: ADV7619


I have trying to get RX Data using Terasic HTMI-FMC card, which uses ADV7619 to receive HDMI stream.  I followed the link to setup the ADV7619 registers:

The registers I set are:

1. Set the RX_FIFO depth to maximum by setting RX_FIFO_PIRQ = 10
2. Write control regisger to Reset the TX_FIFO
3. Wirte control register: Enable the AXI IIC, clear TX_FIFO reset, disable the general call

4. Wirte 1st TX FIFO data: start bit, 0x98 (device address), write bit
5. Wirte 2nd TX FIFO data: 0x03 (sub address), write bit
5. Wirte 3rd TX FIFO data: 0x4c (444 RGB SDR), write bit, stop bit

Using a oscilloscope, I verified the I2C SCLK and SDA are correct.  In the 4-5 steps, I get 3 sharp acknowledge pulses (each after one write) from the ADV7619. So I assumed the register write is good. But somehow when I connected a HDMI video from my laptop, I don't see any of RX signals changes: no HS/VS/PCLK/RxData.

Can anyone help me to find out what I missed ?  I am stuck on this for a few days. 

Many thanks,


  • Hi,

    Could you please share your register configuration.

    Instead of PC as an source, Please check with some other sources like generator and let us know the result.

    Please make sure the crystal pins are oscillating at the right  frequency (i.e 28.6363 MHZ) ?

    Also make sure with below HDMI frontend locking status registers to check whether input device is correctly recognized.                    
              a) Registers HDMI 0x04, 0x07, 0x1B, 0xE0
              b) Registers IO 0x6A, 0x6B
              c) Then Signals on the VS, HS and DE pins.

    Note that, PC generally do not work unless they see a valid EDID &  PC will only recognize a sink only when they detect an valid EDID So please make sure are you configuring with a valid EDID.

    Please make sure with below when bringing up the board.
        1) Disconnect PC from 7619
        2) Run your script,  then you can ignore the writes which corresponds to 72 & this 0x72 writes belongs to ADV7511(Transmitter) part.
        3) Configure EDID
        4) Configure SPA registers
        5) Plug PC into 7619.  this should cause the PC to read the EDID

    Below thread contains an EDID initialization script,



  • Hello Poornima,

    Thanks a lot for your quick help. With your suggestions, I got the HS/VS/RxData/DE signals from a 2K x 2K x 60Hz HDMI video input.  Here is the summary:

    1. I followed the ADV7619 registers setup link from ADI's design document link:

    2. My setup code is in the attached file. Basically, it repeats the 2047.ADV7619-VER.1.9c from the above link.  It runs on a processor of one FPGA using I2C bus.

    3. You are correct on the EDID. My laptop's HDMI output seems require EDID from ADV7619 before sending HTMI signals. When I used my home theater receiver (receives HDMI inputs from the laptop or other devices, and sends HDMI from its own output port), the ADV7619 can receive the HDMI signals. I guess its HDMI output doesn't check EDID.  For now, I can use this setup without worry about the EDID. 

    Now I can move on to process the Rx Data from the HDMI. Again, many thanks for the help. 

    - Charlie

    //writeADV7619Reg(0x98, 0xFF, 0x80);   //I2C reset
    writeADV7619Reg(0x98, 0xF4, 0x80);   //CEC
    writeADV7619Reg(0x98, 0xF5, 0x7C);   //INFOFRAME
    writeADV7619Reg(0x98, 0xF8, 0x4C);   //DPLL
    writeADV7619Reg(0x98, 0xF9, 0x64);   //KSV
    writeADV7619Reg(0x98, 0xFA, 0x6C);   //EDID
    writeADV7619Reg(0x98, 0xFB, 0x68);   //HDMI
    writeADV7619Reg(0x98, 0xFD, 0x44);   //CP
    writeADV7619Reg(0x68, 0xC0, 0x03);   //ADI Required Write
    writeADV7619Reg(0x98, 0x01, 0x06);   //Prim_Mode =110b HDMI-GR
    writeADV7619Reg(0x98, 0x02, 0xF7);   //Auto CSC, 0xRGB, 0xSet op_656 bit
    writeADV7619Reg(0x98, 0x03, 0x82);   //24 bit SDR 422 Mode 0
    writeADV7619Reg(0x98, 0x05, 0x28);   //AV Codes Off
    writeADV7619Reg(0x98, 0x06, 0xA0);   //No inversion on VS,HS pins
    writeADV7619Reg(0x98, 0x0C, 0x42);   //Power up part
    writeADV7619Reg(0x98, 0x15, 0x80);   //Disable Tristate of Pins
    writeADV7619Reg(0x98, 0x19, 0x83);   //LLC DLL phase
    writeADV7619Reg(0x98, 0x33, 0x40);   //LLC DLL MUX enable
    writeADV7619Reg(0x44, 0xBA, 0x01);   //Set HDMI FreeRun
    writeADV7619Reg(0x44, 0x6C, 0x00);   //Required ADI write
    writeADV7619Reg(0x64, 0x40, 0x81);   //Disable HDCP 1.1 features
    writeADV7619Reg(0x4C, 0xB5, 0x01);   //Setting MCLK to 256Fs
    writeADV7619Reg(0x68, 0xC0, 0x03);   //ADI Required write
    writeADV7619Reg(0x68, 0x00, 0x08);   //Set HDMI Input Port A (BG_MEAS_PORT_SEL = 001b)
    writeADV7619Reg(0x68, 0x02, 0x03);   //ALL BG Ports enabled
    writeADV7619Reg(0x68, 0x03, 0x98);   //ADI Required Write
    writeADV7619Reg(0x68, 0x10, 0xA5);   //ADI Required Write
    writeADV7619Reg(0x68, 0x1B, 0x08);   //ADI Required Write
    writeADV7619Reg(0x68, 0x45, 0x04);   //ADI Required Write
    writeADV7619Reg(0x68, 0x97, 0xC0);   //ADI Required Write
    writeADV7619Reg(0x68, 0x3D, 0x10);   //ADI Required Write
    writeADV7619Reg(0x68, 0x3E, 0x69);   //ADI Required Write
    writeADV7619Reg(0x68, 0x3F, 0x46);   //ADI Required Write
    writeADV7619Reg(0x68, 0x4E, 0xFE);   //ADI Required Write
    writeADV7619Reg(0x68, 0x4F, 0x08);   //ADI Required Write
    writeADV7619Reg(0x68, 0x50, 0x00);   //ADI Required Write
    writeADV7619Reg(0x68, 0x57, 0xA3);   //ADI Required Write
    writeADV7619Reg(0x68, 0x58, 0x07);   //ADI Required Write
    writeADV7619Reg(0x68, 0x6F, 0x08);   //ADI Required Write
    writeADV7619Reg(0x68, 0x83, 0xFC);   //Enable clock terminators for port A & B
    writeADV7619Reg(0x68, 0x84, 0x03);   //ADI Required Write
    writeADV7619Reg(0x68, 0x85, 0x11);   //ADI Required Write
    writeADV7619Reg(0x68, 0x86, 0x9B);   //ADI Required Write
    writeADV7619Reg(0x68, 0x89, 0x03);   //ADI Required Write
    writeADV7619Reg(0x68, 0x9B, 0x03);   //ADI Required Write
    writeADV7619Reg(0x68, 0x93, 0x03);   //ADI Required Write
    writeADV7619Reg(0x68, 0x5A, 0x80);   //ADI Required Write
    writeADV7619Reg(0x68, 0x9C, 0x80);   //ADI Required Write
    writeADV7619Reg(0x68, 0x9C, 0xC0);   //ADI Required Write
    writeADV7619Reg(0x68, 0x9C, 0x00);   //ADI Required Write
    writeADV7619Reg(0x72, 0x01, 0x00);   //Set N Value(6144)
    writeADV7619Reg(0x72, 0x02, 0x18);   //Set N Value(6144)
    writeADV7619Reg(0x72, 0x03, 0x00);   //Set N Value(6144)
    writeADV7619Reg(0x72, 0x15, 0x01);   //24bit Input 422 (YCrCb) with Separate Syncs, 0x44.1kHz fs
    writeADV7619Reg(0x72, 0x16, 0x61);   //YCrCb 444
    writeADV7619Reg(0x72, 0x18, 0x46);   //CSC disabled
    writeADV7619Reg(0x72, 0x3B, 0x80);   //PR Auto Mode
    writeADV7619Reg(0x72, 0x40, 0x80);   //General Control Packet Enable
    writeADV7619Reg(0x72, 0x41, 0x10);   //Power Down control
    writeADV7619Reg(0x72, 0x48, 0x08);   //Data right justified
    writeADV7619Reg(0x72, 0x49, 0xA8);   //Set Dither_mode - 12-to-10 bit
    writeADV7619Reg(0x72, 0x4C, 0x04);   //8 bit Output
    writeADV7619Reg(0x72, 0x55, 0x00);   //Set RGB 444 in AVinfo Frame
    writeADV7619Reg(0x72, 0x56, 0x08);   //Set active format Aspect
    writeADV7619Reg(0x72, 0x96, 0x20);   //HPD Interrupt clear
    writeADV7619Reg(0x72, 0x98, 0x03);   //ADI Required Write
    writeADV7619Reg(0x72, 0x99, 0x02);   //ADI Required Write
    writeADV7619Reg(0x72, 0x9C, 0x30);   //PLL Filter R1 Value
    writeADV7619Reg(0x72, 0x9D, 0x61);   //Set clock divide
    writeADV7619Reg(0x72, 0xA2, 0xA4);   //ADI Required Write
    writeADV7619Reg(0x72, 0xA3, 0xA4);   //ADI Required Write
    writeADV7619Reg(0x72, 0xAF, 0x16);   //Set HDMI Mode
    writeADV7619Reg(0x72, 0xBA, 0x60);   //No clock delay
    writeADV7619Reg(0x72, 0xDE, 0x9C);   //ADI Required Write
    writeADV7619Reg(0x72, 0xE4, 0x60);   //VCO Swing Reference Voltage
    writeADV7619Reg(0x72, 0xFA, 0x7D);   //Nbr of times to search for good phase

  • Hi,

      Thanks for letting us know.

       '0x72' writes belongs to ADV7511 part and If you are not using this Tx Part. Please ignore these writes.