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AD8146 DC offset Voltage

I am using AD8146 for single ended to differential conversion of Stanag 3350B signals.  Single ended signals are received from cross point switch. On my input side, it has an offset of 0.6V. But my output side, it should not have any DC offset 

Now, I have to approach to implement this. 

1. Provide AC coupled input ( source side  - 220uF + 75Ohm - High pass filter) or use 75 Ohm and 100nF close to AD8146. 

In this approach, my low frequency signal will not get much distorted as per my understanding. But 220uF is too big to place in PCB, since I will be having 24 Single ended input signals. But, I am worrying about settling time and Phase margin.

2. Or else, control Vocm pin of Ad8146, by providing negative Voltage divider Bias. My input has +0.6 V offset, so I will provide offset of -0.6V to Vocm pin.which will nullify my common mode voltage. But I have to take carry of my supply voltage noise. Here, single Chip will have common bias,

What is the sink current of the pin Vocm?

 Which approach, do you recommend to follow?

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  • FormerMember
    FormerMember
Apr 3, 2023 in reply to Manikandan_M_M +1 verified

Looking at the AD8146 spice model the Vocm resistors are 240K, not 12.5K.  With 3.3V rails and 44k pull down I get -2.4V offset and with 5V rails I get -3.6V offset.  Without drawing up the full spice model…

I would simulate the design for verification using LTSpice https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html .  Use LTC6363 which is in LTSpice's library and similar to AD8146 which is not in the library.  

Since you can't fit a 220uF cap on your board, it leaves only option 2.  Yes, you can shift Vocm pin a bit.  Vocm is a high impedance pin.

  • In AD8146, if i leave my VOCMC pin as floating, my Common-mode voltage is fixed as +2.5V. And in Pg.No: 15, it is described as resistive divider with an impedance of approximately 12.5 kΩ set this level means a resistive divider of R1=R2=12.5K is pull up with +5V.

     Now I need to set my common mode voltage to -0.6V. So,is it okay to pull up with 8.87K to -5V to generate -0.6V.

  • Vocm = (Vpos-Vneg)/2 = 2.5V given +5V - 0V rails.  If you run +5V - -5V then Vocm = 0V.  To offset Vocm by -.6V then you'll have to use a 44.3K resistor to -5V.  Please check my math.

  • Thanks got it.

    I haven't gone through this line, common-mode output of all drivers is set at (VS+ + VS−)/2.

  • Is it Okay to operate AD8145 and AD8146 in +/- 3.3V. Since my output swing won't cross 2Vpp with reference to Gnd and to reduce the power dissipation of IC due to load current. Is there will be any performance degradation due to this. What will be my maximum output swing?

  • I used AD8146 .cir file to simulate in LTspice. As per the datasheet and as you said to generate -0.6V DC Offset, we have to pull up with 44.3K to -5V. But the common mode voltage is set to -2.6V instead of -0.6V

  • The LTC6363 has higher bias resistors then the ADI8146 therefore 44.3K will probably pull the common point lower.  For the LTC6363 to work you'd have to add external resistors in parallel with the bias resistors to get them to 12.5k.  Then the 44.3k would be correct for a 5V rails.  If your rails are going to be 3.3V then the 44.3k resistors will have to be re-calculated for the new rails.

    Once the bias is setup correctly the dynamic performance should be the same.

  • I am using dual supply mode +/- 5V. To get the DC offset of -0.6V. If internally AD8146 has pull up and pull down with 12.5K to +5V and -5V. then additionally we have to pull up with 44.3K to -5V to get this offset. I did the same with AD8146 LTSice model, but instead of -0.6V offset, i am getting -2.6V offset

    AD8146_AD_Query.asc

    LTSPICE SCH is attached for your reference. My doubt is does resistive divider has an impedance of approximately 12.5 kΩ?

  • I am using dual supply mode +/- 5V. To get the DC offset of -0.6V. If internally AD8146 has pull up and pull down with 12.5K to +5V and -5V. then additionally we have to pull up with 44.3K to -5V to get this offset. I did the same with AD8146 LTSice model, but instead of -0.6V offset, i am getting -2.6V offset

    0844.AD8146_AD_Query.asc

    LTSPICE SCH is attached for your reference. My doubt is does resistive divider has an impedance of approximately 12.5 kΩ?