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ADV7280-M,I want to output Frame Start code and Frame End code of CSI short packet data type code from ADV7280.

Category: Hardware
Product Number: ADV7280ABCPZ-M

I'm connecting the CSI output of the ADV7280 to a Lattice FPGA.

[Contents of question]

As a result of checking the short packet data type code of the FPGA CSI DPHY Receiver IP,Frame Start Code(csi short packet Data type=0x00) and Frame End Code(csi short packet Data type=0x01) of csi data type output each line. 

Is it necessary to set the ADV7280 to output the start code at the beginning of the frame?

Thanks and regards,


  • Hi,

      These details we can check with 'MIPI DPHY version 1.00.00 specification' to check whether the output data format is compliance with MIPI-CSI2 Specifications and this is the best way whether whether the output data format is compliance with MIPI-CSI2 Specifications.

      Please refer

    MIPI CSI-2 uses short packets for frame events, and long packets for the image data. Between each packet, the link goes into a low-power state in which it remains until more data needs to be sent.


    By default the ADV728x-M outputs MIPI frame start/end packets as well as line start/end packets. Further information on this is available in the MIPI CSI-2 specification.

    Note that Frame start/end packets are required by the MIPI CSI-2 specification but line start/end packets are optional.