We need to drive the 3.3V pixel bus of the ADV7842 to a 1.8V bank of an FPGA. What possibilities do you suggest for an adaptation? Can it only work with a HighSpeed level shifter or are there other ideas?
We need to drive the 3.3V pixel bus of the ADV7842 to a 1.8V bank of an FPGA. What possibilities do you suggest for an adaptation? Can it only work with a HighSpeed level shifter or are there other ideas?
Hi,
As per ADV7842 specification, Digital I/O Power Supply (DVDDIO) typical voltage is 3.3V is and Min volt is 3.14V, Max volt is 3.46V (The part is spec'd at VDDIO=3.3V +-5%) at https://www.analog.com/media/en/technical-documentation/data-sheets/ADV7842.pdf (Page no:6).
Please note We do not test the device at 1.8V DVDDIO, therefore we have no data on how the device would operate. Even if it work, the pixel bus output timing would be wrong since the drive voltage is lower.
Kindly note We do not have any video components. You can use a 3.3V to 1.8V translator.
Thanks,
Poornima
Thanks Poornima, that was helpful.
The case can be closed.